/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega20_processpptables.c | 300 pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode, 301 pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete, 302 pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels, 303 pptable->DpmDescriptor[PPCLK_FCLK].padding, 304 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m, 305 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b, 306 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a, 307 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b, 308 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c); 365 pr_info("DcModeMaxFreq[PPCLK_FCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_FCLK]);
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D | vega20_hwmgr.c | 767 ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_FCLK); in vega20_setup_default_dpm_tables() 1900 (PPCLK_FCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level() 2002 (PPCLK_FCLK << 16) | (max_freq & 0xffff), in vega20_upload_dpm_max_level() 3438 ret = vega20_get_current_clk_freq(hwmgr, PPCLK_FCLK, &now); in vega20_print_clock_levels() 3627 (PPCLK_FCLK << 16) | dpm_table->dpm_state.soft_min_level, in vega20_set_fclk_to_highest_dpm_level()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
D | dcn401_smu14_driver_if.h | 14 PPCLK_FCLK, enumerator
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D | dcn401_clk_mgr.c | 88 case PPCLK_FCLK: in dcn401_is_ppclk_dpm_enabled() 126 case PPCLK_FCLK: in dcn401_is_ppclk_idle_dpm_enabled() 725 dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_FCLK)) { in dcn401_update_clocks_legacy() 949 dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK) && in dcn401_build_update_bandwidth_clocks_sequence() 951 dcn401_is_ppclk_idle_dpm_enabled(clk_mgr_internal, PPCLK_FCLK); in dcn401_build_update_bandwidth_clocks_sequence() 988 if (dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) { in dcn401_build_update_bandwidth_clocks_sequence() 996 …e->clks.fclk_p_state_change_support && dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) { in dcn401_build_update_bandwidth_clocks_sequence() 1184 dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) { in dcn401_build_update_bandwidth_clocks_sequence() 1533 dcn401_init_single_clock(clk_mgr, PPCLK_FCLK, in dcn401_get_memclk_states_from_smu() 1536 …_base->bw_params->dc_mode_limit.fclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_FCLK); in dcn401_get_memclk_states_from_smu()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_smu13_driver_if.h | 11 PPCLK_FCLK, enumerator
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D | dcn32_clk_mgr.c | 1045 dcn32_init_single_clock(clk_mgr, PPCLK_FCLK, in dcn32_get_memclk_states_from_smu() 1048 …_base->bw_params->dc_mode_limit.fclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_FCLK); in dcn32_get_memclk_states_from_smu()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_smu11_driver_if.h | 11 PPCLK_FCLK, enumerator
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/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | arcturus_ppt.c | 168 CLK_MAP(FCLK, PPCLK_FCLK), 431 !driver_ppt->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete; in arcturus_set_default_dpm_table() 668 *value = metrics->CurrClock[PPCLK_FCLK]; in arcturus_get_smu_metrics_data() 788 case PPCLK_FCLK: in arcturus_get_current_clk_freq_by_table() 1728 pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode, in arcturus_dump_pptable() 1729 pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete, in arcturus_dump_pptable() 1730 pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels, in arcturus_dump_pptable() 1731 pptable->DpmDescriptor[PPCLK_FCLK].padding, in arcturus_dump_pptable() 1732 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m, in arcturus_dump_pptable() 1733 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b, in arcturus_dump_pptable() [all …]
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D | sienna_cichlid_ppt.c | 168 CLK_MAP(FCLK, PPCLK_FCLK), 819 *value = use_metrics_v3 ? metrics_v3->CurrClock[PPCLK_FCLK] : in sienna_cichlid_get_smu_metrics_data() 820 use_metrics_v2 ? metrics_v2->CurrClock[PPCLK_FCLK] : in sienna_cichlid_get_smu_metrics_data() 821 metrics->CurrClock[PPCLK_FCLK]; in sienna_cichlid_get_smu_metrics_data() 1026 !table_member[PPCLK_FCLK].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table() 1220 case PPCLK_FCLK: in sienna_cichlid_get_current_clk_freq_by_table() 2637 pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode, in beige_goby_dump_pptable() 2638 pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete, in beige_goby_dump_pptable() 2639 pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels, in beige_goby_dump_pptable() 2640 pptable->DpmDescriptor[PPCLK_FCLK].Padding, in beige_goby_dump_pptable() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
D | smu13_driver_if_v13_0_6.h | 180 PPCLK_FCLK, enumerator
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D | smu13_driver_if_aldebaran.h | 248 PPCLK_FCLK, enumerator
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D | smu11_driver_if_arcturus.h | 370 PPCLK_FCLK, enumerator
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D | smu13_driver_if_v13_0_0.h | 443 PPCLK_FCLK, enumerator
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D | smu13_driver_if_v13_0_7.h | 444 PPCLK_FCLK, enumerator
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D | smu11_driver_if_sienna_cichlid.h | 477 PPCLK_FCLK, enumerator
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D | smu14_driver_if_v14_0.h | 459 PPCLK_FCLK, enumerator
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/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
D | aldebaran_ppt.c | 161 CLK_MAP(FCLK, PPCLK_FCLK), 641 *value = metrics->CurrClock[PPCLK_FCLK]; in aldebaran_get_smu_metrics_data() 759 case PPCLK_FCLK: in aldebaran_get_current_clk_freq_by_table()
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D | smu_v13_0_7_ppt.c | 150 CLK_MAP(FCLK, PPCLK_FCLK), 801 *value = metrics->CurrClock[PPCLK_FCLK]; in smu_v13_0_7_get_smu_metrics_data() 1038 case PPCLK_FCLK: in smu_v13_0_7_get_current_clk_freq_by_table()
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D | smu_v13_0_0_ppt.c | 179 CLK_MAP(FCLK, PPCLK_FCLK), 809 *value = metrics->CurrClock[PPCLK_FCLK]; in smu_v13_0_0_get_smu_metrics_data() 1049 case PPCLK_FCLK: in smu_v13_0_0_get_current_clk_freq_by_table()
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D | smu_v13_0_6_ppt.c | 184 CLK_MAP(FCLK, PPCLK_FCLK),
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/ |
D | smu11_driver_if.h | 327 PPCLK_FCLK, enumerator
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/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
D | smu_v14_0_2_ppt.c | 144 CLK_MAP(FCLK, PPCLK_FCLK), 731 *value = metrics->CurrClock[PPCLK_FCLK]; in smu_v14_0_2_get_smu_metrics_data() 970 case PPCLK_FCLK: in smu_v14_0_2_get_current_clk_freq_by_table()
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