| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega20_processpptables.c | 249 pptable->DpmDescriptor[PPCLK_DISPCLK].VoltageMode,
250 pptable->DpmDescriptor[PPCLK_DISPCLK].SnapToDiscrete,
251 pptable->DpmDescriptor[PPCLK_DISPCLK].NumDiscreteLevels,
252 pptable->DpmDescriptor[PPCLK_DISPCLK].padding,
253 pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.m,
254 pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.b,
255 pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.a,
256 pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.b,
257 pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.c);
362 pr_info("DcModeMaxFreq[PPCLK_DISPCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DISPCLK]);
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| D | vega20_hwmgr.c | 745 ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DISPCLK); in vega20_setup_default_dpm_tables()
1649 PPCLK_DISPCLK)) == 0, in vega20_init_max_sustainable_clocks()
2314 clk_select = PPCLK_DISPCLK; in vega20_display_clock_voltage_request()
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| D | vega12_hwmgr.c | 758 ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DISPCLK); in vega12_setup_default_dpm_tables()
1589 clk_select = PPCLK_DISPCLK; in vega12_display_clock_voltage_request()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| D | dcn401_smu14_driver_if.h | 17 PPCLK_DISPCLK, enumerator
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| D | dcn401_clk_mgr.c | 92 case PPCLK_DISPCLK: in dcn401_is_ppclk_dpm_enabled()
266 dcn401_init_single_clock(clk_mgr, PPCLK_DISPCLK, in dcn401_init_clocks()
269 …>bw_params->dc_mode_limit.dispclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_DISPCLK); in dcn401_init_clocks()
765 if (clk_mgr->smu_present && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DISPCLK)) in dcn401_update_clocks_legacy()
766 …s.actual_dispclk_khz = dcn401_set_hard_min_by_freq_optimized(clk_mgr, PPCLK_DISPCLK, clk_mgr_base-… in dcn401_update_clocks_legacy()
1291 block_sequence[num_steps].params.update_hardmin_optimized_params.ppclk = PPCLK_DISPCLK; in dcn401_build_update_display_clocks_sequence()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| D | dcn32_smu13_driver_if.h | 16 PPCLK_DISPCLK, enumerator
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| D | dcn32_clk_mgr.c | 212 dcn32_init_single_clock(clk_mgr, PPCLK_DISPCLK, in dcn32_init_clocks()
216 …>bw_params->dc_mode_limit.dispclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_DISPCLK); in dcn32_init_clocks()
411 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, in dcn32_update_clocks_update_dentist()
458 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, in dcn32_update_clocks_update_dentist()
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| D | dcn32_clk_mgr_smu_msg.c | 236 if (clk == PPCLK_DISPCLK) in dcn32_smu_wait_get_hard_min_status()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| D | dcn30_smu11_driver_if.h | 17 PPCLK_DISPCLK, enumerator
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| D | dcn30_clk_mgr.c | 149 dcn3_init_single_clock(clk_mgr, PPCLK_DISPCLK, in dcn3_init_clocks()
296 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dispclk_… in dcn3_update_clocks()
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/ |
| D | smu9_driver_if.h | 226 PPCLK_DISPCLK, enumerator
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| D | smu11_driver_if.h | 324 PPCLK_DISPCLK, enumerator
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| D | smu11_driver_if_navi10.h | 376 PPCLK_DISPCLK, enumerator
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| D | smu13_driver_if_v13_0_0.h | 448 PPCLK_DISPCLK, enumerator
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| D | smu13_driver_if_v13_0_7.h | 449 PPCLK_DISPCLK, enumerator
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| D | smu11_driver_if_sienna_cichlid.h | 483 PPCLK_DISPCLK, enumerator
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| D | smu14_driver_if_v14_0.h | 462 PPCLK_DISPCLK, enumerator
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | navi10_ppt.c | 159 CLK_MAP(DISPCLK, PPCLK_DISPCLK),
1108 !driver_ppt->DpmDescriptor[PPCLK_DISPCLK].SnapToDiscrete; in navi10_set_default_dpm_table()
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| D | sienna_cichlid_ppt.c | 176 CLK_MAP(DISPCLK, PPCLK_DISPCLK),
1125 !table_member[PPCLK_DISPCLK].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table()
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