/linux-6.12.1/Documentation/arch/powerpc/ |
D | dawr-power9.rst | 2 DAWR issues on POWER9 5 On older POWER9 processors, the Data Address Watchpoint Register (DAWR) can 17 cpu : POWER9, altivec supported 33 For ptrace, we now advertise zero breakpoints on POWER9 via the 38 guest on a POWER9 host. Current Linux guests ignore this error, so 42 actually set it on POWER9 hardware. This is done so we don't break 43 migration from POWER8 to POWER9, at the cost of silently losing the 51 For GDB watchpoints (ie 'watch' command) on POWER9 bare metal , GDB 56 The same will also be true for any guests started on a POWER9 63 guest is migrated to a POWER9 host, the watchpoint will be lost on the [all …]
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D | cpu_families.rst | 13 - Radix MMU (POWER9 and later) 109 | POWER9 |
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D | transactional_memory.rst | 205 POWER9 chapter 208 TM on POWER9 has issues with storing the complete register state. This 214 KVM: PPC: Book3S HV: Work around transactional memory bugs in POWER9 216 To account for this different POWER9 chips have TM enabled in 245 Guest migration from POWER8 to POWER9 will work with POWER9N DD2.2 and 246 POWER9C DD1.2. Since earlier POWER9 processors don't support TM 247 emulation, migration from POWER8 to POWER9 is not supported there.
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D | imc.rst | 95 POWER9 supports two modes for IMC which are the Accumulation mode and Trace
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D | cxl.rst | 66 - POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0. 77 PSL8 won't work on a POWER9 system.
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D | elf_hwcaps.rst | 139 instructions with the sequence (as described in, e.g., POWER9 Processor
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/linux-6.12.1/Documentation/devicetree/bindings/powerpc/opal/ |
D | power-mgt.txt | 57 0x00100000 /* This is a fast stop state (POWER9) */ 58 0x00200000 /* This is a deep-stop state (POWER9) */ 71 respectively by the kernel. On POWER9 this property is required. 76 This property is required on POWER9 and absent on POWER8. 82 required on POWER9 and absent on POWER8. 112 POWER9. 118 property on POWER8 and is absent on POWER9.
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/linux-6.12.1/Documentation/hwmon/ |
D | ibmpowernv.rst | 44 sub-group. In POWER9, this attribute corresponds to 57 sub-group. In POWER9, this attribute corresponds to 68 sub-group. In POWER9, this attribute corresponds to 79 sub-group. In POWER9, this attribute corresponds to
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D | occ.rst | 7 * POWER9
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/linux-6.12.1/arch/powerpc/platforms/book3s/ |
D | Kconfig | 9 VAS devices are found in POWER9-based and later systems, they 12 and user-mode APIs for the NX-GZIP accelerator on POWER9 PowerNV
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/linux-6.12.1/Documentation/ABI/testing/ |
D | sysfs-firmware-opal-sensor-groups | 4 Description: Sensor groups directory for POWER9 powernv servers 20 In POWER9, the min-max of a sensor is the historical minimum
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D | sysfs-bus-platform-devices-occ-hwmon | 11 POWER9 and up processors over the Self-Boot Engine (SBE) FIFO.
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D | sysfs-bus-event_source-devices-caps | 18 /sys/bus/event_source/devices/cpu/caps/pmu_name:POWER9
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/linux-6.12.1/drivers/hwmon/occ/ |
D | Kconfig | 21 tristate "POWER9 OCC through SBE" 26 On-Chip Controller (OCC) on a POWER9 processor. However, this driver
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/linux-6.12.1/tools/testing/selftests/powerpc/pmu/sampling_tests/ |
D | misc.c | 78 case POWER9: in init_ev_encodes() 132 if ((pvr != POWER10) && (pvr != POWER9)) in platform_check_for_tests() 499 base_pvr = POWER9; in auxv_generic_compat_pmu()
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D | misc.h | 12 #define POWER9 0x4e macro
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/linux-6.12.1/tools/testing/selftests/powerpc/pmu/event_code_tests/ |
D | reserved_bits_mmcra_sample_elig_mode_test.c | 65 } else if (PVR_VER(mfspr(SPRN_PVR)) == POWER9) { in reserved_bits_mmcra_sample_elig_mode()
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D | blacklisted_events_test.c | 84 SKIP_IF(PVR_VER(pvr) != POWER9); in check_for_power9_version()
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D | event_alternatives_tests_p9.c | 38 SKIP_IF(PVR_VER(mfspr(SPRN_PVR)) != POWER9); in event_alternatives_tests_p9()
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D | generic_events_valid_test.c | 75 } else if (PVR_VER(mfspr(SPRN_PVR)) == POWER9) { in generic_events_valid_test()
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/linux-6.12.1/Documentation/virt/kvm/devices/ |
D | xive.rst | 4 POWER9 eXternal Interrupt Virtualization Engine (XIVE Gen1) 8 - KVM_DEV_TYPE_XIVE POWER9 XIVE Interrupt Controller generation 1 12 POWER9 XIVE interrupt controller. 15 requires a POWER9 host and the guest OS should have support for the
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/linux-6.12.1/Documentation/translations/zh_CN/userspace-api/accelerators/ |
D | ocxl.rst | 158 注意这只在POWER9上可用。
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/linux-6.12.1/arch/powerpc/xmon/ |
D | ppc-opc.c | 2958 #define POWER9 PPC_OPCODE_POWER9 macro 3142 {"maddhd", VXA(4, 48), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}}, 3144 {"maddhdu", VXA(4, 49), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}}, 3147 {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}}, 4149 {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}}, 4150 {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}}, 4411 {"urfid", XL(19,306), 0xffffffff, POWER9, PPCVLE, {0}}, 4412 {"stop", XL(19,370), 0xffffffff, POWER9, PPCVLE, {0}}, 4414 {"doze", XL(19,402), 0xffffffff, POWER6, POWER9|PPCVLE, {0}}, 4418 {"nap", XL(19,434), 0xffffffff, POWER6, POWER9|PPCVLE, {0}}, [all …]
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/linux-6.12.1/arch/powerpc/platforms/ |
D | Kconfig.cputype | 78 (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9 ...) 171 bool "POWER9" 423 Note that POWER9 PowerVM platforms only support the hash
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/linux-6.12.1/Documentation/userspace-api/accelerators/ |
D | ocxl.rst | 164 this is only available on POWER9.
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