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Searched refs:PMSELR_EL0 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/arch/arm64/kvm/
Dsys_regs.c978 __vcpu_sys_reg(vcpu, PMSELR_EL0) = p->regval; in access_pmselr()
981 p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0) in access_pmselr()
1050 idx = SYS_FIELD_GET(PMSELR_EL0, SEL, in access_pmu_evcntr()
1051 __vcpu_sys_reg(vcpu, PMSELR_EL0)); in access_pmu_evcntr()
1101 idx = SYS_FIELD_GET(PMSELR_EL0, SEL, __vcpu_sys_reg(vcpu, PMSELR_EL0)); in access_pmu_evtyper()
2627 { PMU_SYS_REG(PMSELR_EL0),
2628 .access = access_pmselr, .reset = reset_pmselr, .reg = PMSELR_EL0 },
Demulate-nested.c1695 SR_FGT(SYS_PMSELR_EL0, HDFGRTR, PMSELR_EL0, 1),
/linux-6.12.1/Documentation/arch/arm64/
Dperf.rst129 In particular, the PMSELR_EL0 register is zeroed each time the sequence lock is
/linux-6.12.1/arch/arm64/tools/
Dsysreg2181 Sysreg PMSELR_EL0 3 3 9 12 5
2509 Field 19 PMSELR_EL0
2573 Field 19 PMSELR_EL0
/linux-6.12.1/arch/arm64/include/asm/
Dkvm_host.h427 PMSELR_EL0, /* Event Counter Selection Register */ enumerator