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/linux-6.12.1/drivers/video/fbdev/riva/
Dnvreg.h126 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
127 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
128 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
129 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
130 #define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
131 #define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
133 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
134 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
135 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
136 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
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Dnv_driver.c167 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in riva_get_memlen()
168 && ((NV_RD32(chip->PMC, 0x00000000)&0x0F)>=0x02)) { in riva_get_memlen()
281 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in riva_get_maxdclk()
282 && ((NV_RD32(chip->PMC,0x00000000)&0x0F) >= 0x02)) { in riva_get_maxdclk()
330 par->riva.PMC = in riva_common_setup()
Driva_hw.c1379 LOAD_FIXED_STATE(Riva,PMC); in LoadStateExt()
1533 NV_WR32(chip->PMC, 0x00008704, 1); in LoadStateExt()
1534 NV_WR32(chip->PMC, 0x00008140, 0); in LoadStateExt()
1535 NV_WR32(chip->PMC, 0x00008920, 0); in LoadStateExt()
1536 NV_WR32(chip->PMC, 0x00008924, 0); in LoadStateExt()
1537 NV_WR32(chip->PMC, 0x00008908, 0x01ffffff); in LoadStateExt()
1538 NV_WR32(chip->PMC, 0x0000890C, 0x01ffffff); in LoadStateExt()
1539 NV_WR32(chip->PMC, 0x00001588, 0); in LoadStateExt()
1691 NV_WR32(chip->PMC, 0x00000140, chip->EnableIRQ & 0x01); in LoadStateExt()
1948 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in nv3GetConfig()
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/linux-6.12.1/Documentation/firmware-guide/acpi/
Dintel-pmc-mux.rst10 North Mux-Agent is a function of the Intel PMC firmware that is supported on
11 most Intel based platforms that have the PMC microcontroller. It's used for
16 The North Mux-Agent (aka. Intel PMC Mux Control, or just mux-agent) driver
17 communicates with the PMC microcontroller by using the PMC IPC method
31 is a separate child node under the PMC mux-agent device node. Those nodes do not
35 Scope (_SB.PCI0.PMC.MUX)
54 Scope (_SB.PCI0.PMC.MUX)
73 In order to configure the muxes behind a USB Type-C connector, the PMC firmware
80 the PMC::
117 Scope (_SB.PCI0.PMC)
/linux-6.12.1/Documentation/devicetree/bindings/powerpc/fsl/
Dpmc.txt6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
23 is the PMC block, and the second resource is the Clock Configuration
30 resource is the PMC block interrupt.
/linux-6.12.1/Documentation/ABI/obsolete/
Dsysfs-driver-intel_pmc_bxt1 These files allow sending arbitrary IPC commands to the PMC/SCU which
10 IPC command to the PMC/SCU.
20 Northpeak through the PMC/SCU.
/linux-6.12.1/drivers/platform/x86/intel/pmc/
DKconfig7 tristate "Intel PMC Core driver"
16 tasks in the PMC in order to enable transition into the SLPS0 state.
26 - PMC quirks as needed to enable SLPS0/S0ix
/linux-6.12.1/Documentation/driver-api/xilinx/
Deemi.rst10 used by any driver to communicate with PMC(Platform Management Controller).
16 device to communicate with a power management controller (PMC) on a
19 Any driver who wants to communicate with PMC using EEMI APIs use the
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dvt8500.txt16 - reg : shall be the control register offset from PMC base for the pll clock.
36 - enable-reg : shall be the register offset from PMC base for the enable
44 - divisor-reg : shall be the register offset from PMC base for the divisor
/linux-6.12.1/drivers/video/fbdev/nvidia/
Dnv_hw.c147 pll = NV_RD32(par->PMC, 0x4020); in nvGetClocks()
149 pll = NV_RD32(par->PMC, 0x4024); in nvGetClocks()
162 pll = NV_RD32(par->PMC, 0x4000); in nvGetClocks()
164 pll = NV_RD32(par->PMC, 0x4004); in nvGetClocks()
950 NV_WR32(par->PMC, 0x0140, 0x00000000); in NVLoadStateExt()
951 NV_WR32(par->PMC, 0x0200, 0xFFFF00FF); in NVLoadStateExt()
952 NV_WR32(par->PMC, 0x0200, 0xFFFFFFFF); in NVLoadStateExt()
1266 NV_WR32(par->PMC, 0x1700, in NVLoadStateExt()
1268 NV_WR32(par->PMC, 0x1704, 0); in NVLoadStateExt()
1269 NV_WR32(par->PMC, 0x1708, 0); in NVLoadStateExt()
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Dnv_backlight.c57 tmp_pmc = NV_RD32(par->PMC, 0x10F0) & 0x0000FFFF; in nvidia_bl_update_status()
70 NV_WR32(par->PMC, 0x10F0, tmp_pmc); in nvidia_bl_update_status()
Dnv_setup.c234 if (!(NV_RD32(par->PMC, 0x0004) & 0x01000001)) { in nv10GetConfig()
235 NV_WR32(par->PMC, 0x0004, 0x01000001); in nv10GetConfig()
303 par->PMC = par->REGS + (0x00000000 / 4); in NVCommonSetup()
Dnv_type.h164 volatile u32 __iomem *PMC; member
/linux-6.12.1/drivers/perf/
Dfsl_imx9_ddr_perf.c46 #define PMC(n) (0x40 + 0x18 + (0x10 * n)) macro
346 writel(0, pmu->base + PMC(counter) + 0x4); in ddr_perf_clear_counter()
347 writel(0, pmu->base + PMC(counter)); in ddr_perf_clear_counter()
349 writel(0, pmu->base + PMC(counter)); in ddr_perf_clear_counter()
359 val = readl_relaxed(pmu->base + PMC(counter)); in ddr_perf_read_counter()
365 val_upper = readl_relaxed(pmu->base + PMC(counter) + 0x4); in ddr_perf_read_counter()
366 val_lower = readl_relaxed(pmu->base + PMC(counter)); in ddr_perf_read_counter()
367 } while (val_upper != readl_relaxed(pmu->base + PMC(counter) + 0x4)); in ddr_perf_read_counter()
/linux-6.12.1/drivers/platform/x86/amd/pmc/
DKconfig3 # AMD PMC Driver
7 tristate "AMD SoC PMC driver"
/linux-6.12.1/drivers/usb/typec/mux/
DKconfig29 tristate "Intel PMC mux control"
35 Driver for USB muxes controlled by Intel PMC FW. Intel PMC FW can
/linux-6.12.1/drivers/net/can/esd/
DKconfig9 M.2 PCIe, CPCIserial, PMC, XMC (see https://esd.eu/en)
/linux-6.12.1/arch/powerpc/boot/dts/
Dxpedite5200_xmon.dts17 form-factor = "PMC/XMC";
108 * 6: PMC monarch indicator
109 * 7: PMC EREADY
445 /* PMC interface */
Dmvme5100.dts130 /* IDSEL 16 - PMC Slot 1 */
136 /* IDSEL 17 - PMC Slot 2 */
Dxpedite5200.dts104 * 6: PMC monarch indicator
105 * 7: PMC EREADY
442 /* PMC interface */
/linux-6.12.1/arch/sparc/include/asm/
Dns87303.h20 #define PMC 0x06 macro
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-platform-intel-pmc13 Display global reset setting bits for PMC.
/linux-6.12.1/drivers/platform/mellanox/
DKconfig78 Say y here to enable PMC support. The PMC driver provides access
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a-tqmls1021a.dtsi34 /* On-board PMC at 0x11 */
/linux-6.12.1/drivers/pinctrl/renesas/
Dpinctrl-rzg2l.c134 #define PMC(off) (0x0200 + (off)) macro
465 reg = readb(pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
466 writeb(reg & ~BIT(pin), pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
474 reg = readb(pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
475 writeb(reg | BIT(pin), pctrl->base + PMC(off)); in rzg2l_pinctrl_set_pfc_mode()
1617 reg8 = readb(pctrl->base + PMC(off)); in rzg2l_gpio_request()
1619 pctrl->data->pmc_writeb(pctrl, reg8, PMC(off)); in rzg2l_gpio_request()
1655 if (!(readb(pctrl->base + PMC(off)) & BIT(bit))) { in rzg2l_gpio_get_direction()
2343 reg8 = readb(pctrl->base + PMC(off)); in rzg2l_gpio_interrupt_input_mode()
2800 RZG2L_PCTRL_REG_ACCESS8(suspend, pctrl->base + PMC(off), cache->pmc[port]); in rzg2l_pinctrl_pm_setup_regs()
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