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Searched refs:PHY_S6G_PLL5G_CFG2_ENA_GAIN (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/net/phy/mscc/
Dmscc_serdes.h12 #define PHY_S6G_PLL5G_CFG2_ENA_GAIN 1 macro
Dmscc_serdes.c21 rd_dat |= PHY_S6G_PLL5G_CFG2_ENA_GAIN; in pll5g_detune()
35 rd_dat &= ~PHY_S6G_PLL5G_CFG2_ENA_GAIN; in pll5g_tune()