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Searched refs:PHY_S6G_PLL5G_CFG2 (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/net/phy/mscc/
Dmscc_serdes.c19 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_detune()
23 PHY_S6G_PLL5G_CFG2, rd_dat); in pll5g_detune()
34 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_tune()
37 PHY_S6G_PLL5G_CFG2, rd_dat); in pll5g_tune()
Dmscc.h105 #define PHY_S6G_PLL5G_CFG2 0x08 macro
Dmscc_main.c1262 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in vsc8584_pll5g_cfg2_wr()
1265 vsc85xx_csr_write(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2, rd_dat); in vsc8584_pll5g_cfg2_wr()