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Searched refs:PHYCSYMCLK_CLOCK_CNTL (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
Ddcn30_dccg.h41 SR(PHYCSYMCLK_CLOCK_CNTL)
51 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
52 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
Ddcn31_dccg.h40 SR(PHYCSYMCLK_CLOCK_CNTL),\
89 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
90 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
Ddcn31_dccg.c488 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
495 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
Ddcn35_dccg.h64 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_EN, mask_sh),\
65 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_SRC_SEL, mask_sh),\
143 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_EN, mask_sh),\
144 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_SRC_SEL, mask_sh),\
Ddcn35_dccg.c714 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_EN, in dccg35_set_physymclk_src_new()
1579 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg35_set_physymclk()
1583 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg35_set_physymclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
Ddcn314_dccg.h45 SR(PHYCSYMCLK_CLOCK_CNTL),\
180 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
181 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
Ddcn32_dccg.h51 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\
52 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
Ddcn401_dccg.h51 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_EN, mask_sh),\
52 DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_SRC_SEL, mask_sh),\
Ddcn401_dccg.c313 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk()
320 REG_UPDATE_2(PHYCSYMCLK_CLOCK_CNTL, in dccg401_set_physymclk()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
Ddcn20_dccg.h391 uint32_t PHYCSYMCLK_CLOCK_CNTL; member
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.h621 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.h1235 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \