Searched refs:PHYCLKD32 (Results 1 – 2 of 2) sorted by relevance
390 double PHYCLKD32,6660 double PHYCLKD32, in CalculateOutputLink() argument6738 …PRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr10) && PHYCLKD32 >= 10000.0 / 32)… in CalculateOutputLink()6741 …if (*OutBpp == 0 && PHYCLKD32 < 13500.0 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && Force… in CalculateOutputLink()6751 …ate_na || OutputLinkDPRate == dml2_dp_rate_uhbr13p5) && *OutBpp == 0 && PHYCLKD32 >= 13500.0 / 32)… in CalculateOutputLink()6755 …if (*OutBpp == 0 && PHYCLKD32 < 20000 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && ForcedO… in CalculateOutputLink()6765 …p_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr20) && *OutBpp == 0 && PHYCLKD32 >= 20000 / 32) { in CalculateOutputLink()
4162 double PHYCLKD32, in CalculateOutputLink() argument4238 …PRate == dml2_dp_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr10) && PHYCLKD32 >= 10000.0 / 32)… in CalculateOutputLink()4241 …if (*OutBpp == 0 && PHYCLKD32 < 13500.0 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && Force… in CalculateOutputLink()4251 …ate_na || OutputLinkDPRate == dml2_dp_rate_uhbr13p5) && *OutBpp == 0 && PHYCLKD32 >= 13500.0 / 32)… in CalculateOutputLink()4255 …if (*OutBpp == 0 && PHYCLKD32 < 20000.0 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && Force… in CalculateOutputLink()4265 …_rate_na || OutputLinkDPRate == dml2_dp_rate_uhbr20) && *OutBpp == 0 && PHYCLKD32 >= 20000.0 / 32)… in CalculateOutputLink()