/linux-6.12.1/include/dt-bindings/clock/ |
D | rk3308-cru.h | 180 #define PCLK_UART4 201 macro
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D | rk3368-cru.h | 129 #define PCLK_UART4 345 macro
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D | rk3288-cru.h | 137 #define PCLK_UART4 345 macro
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D | px30-cru.h | 155 #define PCLK_UART4 332 macro
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D | rockchip,rk3576-cru.h | 150 #define PCLK_UART4 132 macro
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D | rockchip,rv1126-cru.h | 315 #define PCLK_UART4 253 macro
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D | rockchip,rk3588-cru.h | 177 #define PCLK_UART4 162 macro
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D | rk3568-cru.h | 360 #define PCLK_UART4 296 macro
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/linux-6.12.1/drivers/clk/rockchip/ |
D | clk-rk3368.c | 796 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 10, GFLAGS),
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D | clk-rk3288.c | 743 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 12, GFLAGS),
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D | clk-px30.c | 849 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 8, GFLAGS),
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D | clk-rk3308.c | 869 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0, RK3308_CLKGATE_CON(5), 14, GFLAGS),
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D | clk-rv1126.c | 490 GATE(PCLK_UART4, "pclk_uart4", "pclk_pdbus", 0,
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D | clk-rk3568.c | 1245 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0,
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D | clk-rk3576.c | 646 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus_root", 0,
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D | clk-rk3588.c | 1225 GATE(PCLK_UART4, "pclk_uart4", "pclk_top_root", 0,
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/linux-6.12.1/arch/arm/boot/dts/rockchip/ |
D | rv1126.dtsi | 500 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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D | rk3288.dtsi | 446 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | rk3368.dtsi | 367 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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D | rk3308.dtsi | 358 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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D | rk356x.dtsi | 1441 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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D | px30.dtsi | 548 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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D | rk3588-base.dtsi | 2232 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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