Home
last modified time | relevance | path

Searched refs:PCLK_UART4 (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Drk3308-cru.h180 #define PCLK_UART4 201 macro
Drk3368-cru.h129 #define PCLK_UART4 345 macro
Drk3288-cru.h137 #define PCLK_UART4 345 macro
Dpx30-cru.h155 #define PCLK_UART4 332 macro
Drockchip,rk3576-cru.h150 #define PCLK_UART4 132 macro
Drockchip,rv1126-cru.h315 #define PCLK_UART4 253 macro
Drockchip,rk3588-cru.h177 #define PCLK_UART4 162 macro
Drk3568-cru.h360 #define PCLK_UART4 296 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3368.c796 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 10, GFLAGS),
Dclk-rk3288.c743 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 12, GFLAGS),
Dclk-px30.c849 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 8, GFLAGS),
Dclk-rk3308.c869 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0, RK3308_CLKGATE_CON(5), 14, GFLAGS),
Dclk-rv1126.c490 GATE(PCLK_UART4, "pclk_uart4", "pclk_pdbus", 0,
Dclk-rk3568.c1245 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0,
Dclk-rk3576.c646 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus_root", 0,
Dclk-rk3588.c1225 GATE(PCLK_UART4, "pclk_uart4", "pclk_top_root", 0,
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drv1126.dtsi500 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3288.dtsi446 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3368.dtsi367 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3308.dtsi358 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk356x.dtsi1441 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Dpx30.dtsi548 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
Drk3588-base.dtsi2232 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;