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Searched refs:PCIE0_BASE__INST0_SEG3 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi14_ip_offset.h826 #define PCIE0_BASE__INST0_SEG3 0x00010400 macro
Dnavi12_ip_offset.h826 #define PCIE0_BASE__INST0_SEG3 0 macro
Dsienna_cichlid_ip_offset.h833 #define PCIE0_BASE__INST0_SEG3 0x00010400 macro
Dbeige_goby_ip_offset.h981 #define PCIE0_BASE__INST0_SEG3 0x00010400 macro
Drenoir_ip_offset.h1076 #define PCIE0_BASE__INST0_SEG3 0 macro
Dvangogh_ip_offset.h1181 #define PCIE0_BASE__INST0_SEG3 0x00010400 macro
Darct_ip_offset.h863 #define PCIE0_BASE__INST0_SEG3 0 macro
Daldebaran_ip_offset.h1153 #define PCIE0_BASE__INST0_SEG3 0 macro