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Searched refs:PCIE0_BASE__INST0_SEG1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi14_ip_offset.h824 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
Dnavi12_ip_offset.h824 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro
Dsienna_cichlid_ip_offset.h831 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
Dbeige_goby_ip_offset.h979 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
Drenoir_ip_offset.h1074 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro
Dvangogh_ip_offset.h1179 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
Darct_ip_offset.h861 #define PCIE0_BASE__INST0_SEG1 0x00411800 macro
Daldebaran_ip_offset.h1151 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro