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Searched refs:PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5577 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT 0x0000000e macro
Dgfx_7_2_sh_mask.h5580 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT 0xe macro
Dgfx_8_1_sh_mask.h6902 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT 0xe macro
Dgfx_8_0_sh_mask.h6368 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT 0xe macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16900 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_9_1_sh_mask.h18205 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_9_4_3_sh_mask.h20206 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_9_2_1_sh_mask.h18080 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_9_4_2_sh_mask.h10327 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_11_5_0_sh_mask.h18073 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_11_0_0_sh_mask.h22099 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_12_0_0_sh_mask.h30196 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_11_0_3_sh_mask.h24429 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_10_1_0_sh_mask.h24391 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro
Dgc_10_3_0_sh_mask.h22580 #define PA_CL_CLIP_CNTL__PS_UCP_MODE__SHIFT … macro