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Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 – 22 of 22) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsoc15d.h105 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dnvd.h76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dvid.h131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dgfx_v7_0.c2275 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2481 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
3891 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
Dsid.h1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dgfx_v6_0.c2850 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
2939 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
Dgfx_v8_0.c1222 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4160 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6323 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
Dgfx_v11_0.c820 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_get_csb_buffer()
3443 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_cp_gfx_start()
5805 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_ring_emit_cntxcntl()
Dgfx_v9_0.c1628 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3281 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5844 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
Dgfx_v10_0.c4248 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
6234 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
8734 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
Dgfx_v12_0.c4482 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v12_0_ring_emit_cntxcntl()
/linux-6.12.1/drivers/gpu/drm/radeon/
Dnid.h1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsid.h1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsi.c4537 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4650 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5709 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
Devergreen_cs.c1828 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3378 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
Devergreend.h1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dr600d.h1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dr600_cs.c1688 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
Dcik.c3999 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()