/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn32/ |
D | dcn32_optc.c | 160 REG_UPDATE_2(OTG_CONTROL, in optc32_enable_crtc() 188 REG_UPDATE(OTG_CONTROL, in optc32_disable_crtc() 207 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc32_phantom_crtc_post_enable() 224 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc32_disable_phantom_otg()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn20/ |
D | dcn20_optc.c | 69 REG_UPDATE_2(OTG_CONTROL, in optc2_enable_crtc() 275 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc2_align_vblanks() 277 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks() 334 REG_UPDATE(OTG_CONTROL, in optc2_align_vblanks() 351 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn401/ |
D | dcn401_optc.c | 195 REG_UPDATE_2(OTG_CONTROL, in optc401_enable_crtc() 223 REG_UPDATE(OTG_CONTROL, in optc401_disable_crtc() 242 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc401_phantom_crtc_post_enable() 259 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc401_disable_phantom_otg() 376 REG_UPDATE(OTG_CONTROL, OTG_OUT_MUX, dest); in optc401_set_out_mux()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn314/ |
D | dcn314_optc.c | 120 REG_UPDATE_2(OTG_CONTROL, in optc314_enable_crtc() 138 REG_UPDATE(OTG_CONTROL, in optc314_disable_crtc() 157 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc314_phantom_crtc_post_enable()
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D | dcn314_optc.h | 51 SRI(OTG_CONTROL, OTG, inst),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn31/ |
D | dcn31_optc.c | 110 REG_UPDATE_2(OTG_CONTROL, in optc31_enable_crtc() 138 REG_UPDATE(OTG_CONTROL, in optc31_disable_crtc() 159 REG_UPDATE_2(OTG_CONTROL, in optc31_immediate_disable_crtc()
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D | dcn31_optc.h | 50 SRI(OTG_CONTROL, OTG, inst),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn35/ |
D | dcn35_optc.c | 127 REG_UPDATE_2(OTG_CONTROL, in optc35_enable_crtc() 155 REG_UPDATE(OTG_CONTROL, in optc35_disable_crtc() 175 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc35_phantom_crtc_post_enable()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
D | dcn10_optc.c | 282 REG_UPDATE_2(OTG_CONTROL, in optc1_program_timing() 545 REG_UPDATE_2(OTG_CONTROL, in optc1_enable_crtc() 563 REG_UPDATE_2(OTG_CONTROL, in optc1_disable_crtc() 1335 REG_GET(OTG_CONTROL, in optc1_read_otg_state() 1409 REG_GET(OTG_CONTROL, in optc1_get_otg_active_size() 1447 REG_GET(OTG_CONTROL, OTG_MASTER_EN, &otg_enabled); in optc1_is_tg_enabled()
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D | dcn10_optc.h | 52 SRI(OTG_CONTROL, OTG, inst),\ 124 uint32_t OTG_CONTROL; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/optc/dcn30/ |
D | dcn30_optc.c | 139 REG_UPDATE(OTG_CONTROL, OTG_OUT_MUX, dest); in optc3_set_out_mux()
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D | dcn30_optc.h | 52 SRI(OTG_CONTROL, OTG, inst),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
D | dcn35_resource.h | 236 SRI_ARR(OTG_CONTROL, OTG, inst),\
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
D | dcn401_resource.h | 493 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
D | dcn32_resource.h | 1011 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \
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