Searched refs:Number (Results 1 – 25 of 338) sorted by relevance
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3 # Hardware Random Number Generator (RNG) configuration7 tristate "Hardware Random Number Generator Core support"10 Hardware Random Number Generator Core infrastructure.25 tristate "Timer IOMEM HW Random Number Generator support"29 Number Generator used by reading a 'dumb' iomem address that39 tristate "Intel HW Random Number Generator support"43 This driver provides kernel-side support for the Random Number52 tristate "AMD HW Random Number Generator support"57 This driver provides kernel-side support for the Random Number66 tristate "Atmel Random Number Generator support"[all …]
170 |Cookies |n=N |Number of data storage cookies allocated |172 | |v=N |Number of volume index cookies allocated |174 | |vcol=N |Number of volume index key collisions |176 | |voom=N |Number of OOM events when allocating volume cookies |178 |Acquire |n=N |Number of acquire cookie requests seen |180 | |ok=N |Number of acq reqs succeeded |182 | |oom=N |Number of acq reqs failed on ENOMEM |184 |LRU |n=N |Number of cookies currently on the LRU |186 | |exp=N |Number of cookies expired off of the LRU |188 | |rmv=N |Number of cookies removed from the LRU |[all …]
127 idles (RO) Number of times the interface was130 watchdog_pretimeouts (RO) Number of watchdog pretimeouts.132 complete_transactions (RO) Number of completed messages.134 events (RO) Number of IPMI events received from137 interrupts (RO) Number of interrupts the driver140 hosed_count (RO) Number of times the hardware didn't143 long_timeouts (RO) Number of times the driver147 flag_fetches (RO) Number of times the driver150 attentions (RO) Number of time the driver got an153 incoming_messages (RO) Number of asynchronous messages[all …]
21 Number of frequency points (steps) in the frequency sweep.32 Number of output excitation cycles (settling time cycles)
39 Number of flush requests from the frontend.46 Number of requests delayed because the backend was too54 Number of read requests from the frontend.61 Number of sectors read by the frontend.68 Number of write requests from the frontend.75 Number of sectors written by the frontend.
12 Description: Number of seconds the SCSI layer will wait after a transport21 Description: Number of seconds the SCSI layer will wait after a transport37 Description: Number of seconds the SCSI layer will wait after a reconnect
165 - Number of CQEs events on SQ issued on ring i.191 - Number of received packets processed using hardware-accelerated GRO. The197 - Number of received bytes processed using hardware-accelerated GRO. The208 - Number of receive packets using hardware-accelerated GRO that have large213 - Number of header only packets in header/data split mode [#accel]_.217 - Number of bytes for header only packets in header/data split mode222 - Number of packets that were not split in header/data split mode. A230 - Number of bytes for packets that were not split in header/data split257 - Number of received packets dropped in software because the CQE data is279 - Number of received packets that had checksum calculation computed,[all …]
10 a Random Number Generator (RNG). The software has two parts:53 Hardware driver for Intel/AMD/VIA Random Number Generators (RNG)61 The Firmware Hub integrates a Random Number Generator (RNG)93 May 1999 Order Number: 290658-002 R96 Random Number Generator98 December 1999 Order Number: 298029-001 R100 Intel 82802 Firmware HUB Random Number Generator Driver
31 db_count Number of doorbells; default = 436 num_mws Number of memory windows; max = 437 spad_count Number of scratchpad registers; default = 64
56 - nvidia,snor-muxed-width: Number of cycles MUX address/data asserted on the58 - nvidia,snor-hold-width: Number of cycles CE stays asserted after the61 - nvidia,snor-adv-width: Number of cycles during which ADV stays asserted.63 - nvidia,snor-ce-width: Number of cycles before CE is asserted.65 - nvidia,snor-we-width: Number of cycles during which WE stays asserted.67 - nvidia,snor-oe-width: Number of cycles during which OE stays asserted.69 - nvidia,snor-wait-width: Number of cycles before READY is asserted.
6 - #pwm-cells : Number of cells used to specify a PWM. First cell22 - st,pwm-num-chan: Number of available PWM channels. Default is 0.23 - st,capture-num-chan: Number of available Capture channels. Default is 0.
1 Random Number Algorithm Definitions7 Crypto API Random Number API
6 - #lines : Number of lines on the operator panel e.g. <0x2>.7 - #length : Number of characters per line of the operator panel e.g. <0x10>.
36 1E8/001 ALL e820_entries Number of entries in e820_table (below)37 1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)38 1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer
53 Number of deserializer output lanes.154 Number of PCLK pulses between deassertion of the HSYNC signal and the first161 Number of PCLK pulses between the end of the last valid pixel in the video168 Number of video lines between deassertion of the VSYNC signal and the video175 Number of video lines between the end of the last valid pixel line (marked273 Number of PCLK pulses between deassertion of the HSYNC signal and the first277 Number of PCLK pulses between the end of the last valid pixel in the video282 Number of video lines between deassertion of the VSYNC signal and the video286 Number of video lines between the end of the last valid pixel line (marked293 Number of deserializer input lines.[all …]
249 #used metadata blocks Number of metadata blocks used253 #used cache blocks Number of blocks resident in the cache255 #read hits Number of times a READ bio has been mapped257 #read misses Number of times a READ bio has been mapped259 #write hits Number of times a WRITE bio has been mapped261 #write misses Number of times a WRITE bio has been263 #demotions Number of times a block has been removed265 #promotions Number of times a block has been moved to267 #dirty Number of blocks in the cache that differ269 #feature args Number of feature args to follow[all …]
13 int "Number of receive buffers"18 int "Number of transmit buffers"
34 Number of kernel threads that will stress exclusive lock39 Number of kernel threads that will stress shared lock103 Number of seconds between statistics-related printk()s.137 (B): Number of writer lock acquisitions. If dealing with a read/write140 (C): Number of times the lock was acquired.
33 the Pseudo-Random Number Generator found in the Security System.87 the Pseudo-Random Number Generator found in the Crypto Engine.95 the True Random Number Generator found in the Crypto Engine.130 the Pseudo-Random Number Generator found in the Security System.
21 Number(i32), enumerator50 Value::Number(number) => write!(formatter, "{}", number), in fmt()76 Self::Number(value) in from()
28 Number of partitions per device (default: 0).31 Number of block devices that should be initialized (default: 16).
12 - #address-cells: Number of address cells14 - #pinctrl-cells: Number of pinctrl cells, must be 2. See also
17 - nand-ecc-strength: Number of bits to correct per ECC step.18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
11 - dma-requests: Number of DMA requests for the mux15 - dma-requests: Number of DMA requests the controller can handle
103 sra $18,3,$3 # U : Number of remaining quads to write104 and $18,7,$18 # E : Number of trailing bytes to write281 sra $18,3,$3 # U : Number of remaining quads to write282 and $18,7,$18 # E : Number of trailing bytes to write469 sra $18,3,$3 # U : Number of remaining quads to write470 and $18,7,$18 # E : Number of trailing bytes to write