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Searched refs:NV_CIO_CRE_RPC1_INDEX (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/
Ddac.c169 saved_rpc1 = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX); in nv04_dac_detect()
170 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1 & ~0xc0); in nv04_dac_detect()
223 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1); in nv04_dac_detect()
285 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0)) in nv17_dac_sample_load()
Dtvnv04.c89 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX); in nv04_tv_dpms()
97 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A); in nv04_tv_dpms()
Dnvreg.h231 # define NV_CIO_CRE_RPC1_INDEX 0x1a /* repaint control 1 */ macro
Dcrtc.c196 NV_CIO_CRE_RPC1_INDEX) & ~0xC0; in nv_crtc_dpms()
233 NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RPC1_INDEX, crtc1A); in nv_crtc_dpms()
392 regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ? in nv_crtc_mode_set_vga()
Dhw.c599 rd_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX); in nv_save_state_ext()
713 wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX); in nv_load_state_ext()