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Searched refs:NV04_PFIFO_CACHE1_DMA_PUT (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv10.c61 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
Dregsnv04.h109 #define NV04_PFIFO_CACHE1_DMA_PUT 0x00003240 macro
Dnv17.c62 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
Dnv40.c65 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
Dnv04.c140 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
/linux-6.12.1/drivers/gpu/drm/nouveau/
Dnouveau_reg.h545 #define NV04_PFIFO_CACHE1_DMA_PUT 0x00003240 macro