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Searched refs:NV03_PFIFO_CACHE1_PUSH1 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv04.c56 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_chan_stop()
80 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv04_chan_stop()
418 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & fifo->chid->mask; in nv04_fifo_intr()
483 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv04_fifo_init()
Dregsnv04.h36 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro
Dnv17.c111 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv17_fifo_init()
Dnv40.c221 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUSH1, fifo->chid->mask); in nv40_fifo_init()
/linux-6.12.1/drivers/gpu/drm/nouveau/
Dnouveau_reg.h472 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 macro