Searched refs:NAU8824_REG_ADC_CH0_DGAIN_CTRL (Results 1 – 2 of 2) sorted by relevance
142 { NAU8824_REG_ADC_CH0_DGAIN_CTRL, 0x0100 },239 case NAU8824_REG_ADC_CH0_DGAIN_CTRL ... NAU8824_REG_ADC_TO_DAC_ST: in nau8824_readable_reg()266 case NAU8824_REG_ADC_CH0_DGAIN_CTRL ... NAU8824_REG_ADC_TO_DAC_ST: in nau8824_writeable_reg()332 SOC_ENUM_SINGLE(NAU8824_REG_ADC_CH0_DGAIN_CTRL, 9,393 SOC_SINGLE_TLV("DMIC1 Volume", NAU8824_REG_ADC_CH0_DGAIN_CTRL,
49 #define NAU8824_REG_ADC_CH0_DGAIN_CTRL 0x2D macro