Searched refs:MemoryLevel (Results 1 – 14 of 14) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
D | ci_smumgr.c | 1309 …_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, MemoryLevel); in ci_populate_all_memory_levels() 1311 SMU7_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel; in ci_populate_all_memory_levels() 1320 &(smu_data->smc_state_table.MemoryLevel[i])); in ci_populate_all_memory_levels() 1325 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in ci_populate_all_memory_levels() 1331 smu_data->smc_state_table.MemoryLevel[1].MinVddci = in ci_populate_all_memory_levels() 1332 smu_data->smc_state_table.MemoryLevel[0].MinVddci; in ci_populate_all_memory_levels() 1333 smu_data->smc_state_table.MemoryLevel[1].MinMvdd = in ci_populate_all_memory_levels() 1334 smu_data->smc_state_table.MemoryLevel[0].MinMvdd; in ci_populate_all_memory_levels() 1336 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in ci_populate_all_memory_levels() 1337 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in ci_populate_all_memory_levels() [all …]
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D | tonga_smumgr.c | 1097 offsetof(SMU72_Discrete_DpmTable, MemoryLevel); in tonga_populate_all_memory_levels() 1102 smu_data->smc_state_table.MemoryLevel; in tonga_populate_all_memory_levels() 1114 &(smu_data->smc_state_table.MemoryLevel[i])); in tonga_populate_all_memory_levels() 1120 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in tonga_populate_all_memory_levels() 1127 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in tonga_populate_all_memory_levels() 1128 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in tonga_populate_all_memory_levels() 1133 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in tonga_populate_all_memory_levels() 1242 smu_data->smc_state_table.MemoryLevel[0].MinVoltage; in tonga_populate_smc_acpi_level() 3160 offsetof(SMU72_Discrete_DpmTable, MemoryLevel); in tonga_update_dpm_settings() 3162 smu_data->smc_state_table.MemoryLevel; in tonga_update_dpm_settings()
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D | iceland_smumgr.c | 1354 …rray_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTable, MemoryLevel); in iceland_populate_all_memory_levels() 1356 SMU71_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel; in iceland_populate_all_memory_levels() 1365 &(smu_data->smc_state_table.MemoryLevel[i])); in iceland_populate_all_memory_levels() 1372 smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in iceland_populate_all_memory_levels() 1379 smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F; in iceland_populate_all_memory_levels() 1380 CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel); in iceland_populate_all_memory_levels() 1385 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in iceland_populate_all_memory_levels()
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D | polaris10_smumgr.c | 155 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_setup_graphics_level_structure() 1216 offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_populate_all_memory_levels() 1220 smu_data->smc_state_table.MemoryLevel; in polaris10_populate_all_memory_levels() 1242 smu_data->smc_state_table.MemoryLevel[i].EnabledForActivity = in polaris10_populate_all_memory_levels() 2599 offsetof(SMU74_Discrete_DpmTable, MemoryLevel); in polaris10_update_dpm_settings() 2601 smu_data->smc_state_table.MemoryLevel; in polaris10_update_dpm_settings()
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D | fiji_smumgr.c | 1227 offsetof(SMU73_Discrete_DpmTable, MemoryLevel); in fiji_populate_all_memory_levels() 1231 smu_data->smc_state_table.MemoryLevel; in fiji_populate_all_memory_levels() 2561 offsetof(SMU73_Discrete_DpmTable, MemoryLevel); in fiji_update_dpm_settings() 2563 smu_data->smc_state_table.MemoryLevel; in fiji_update_dpm_settings()
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D | vegam_smumgr.c | 1042 offsetof(SMU75_Discrete_DpmTable, MemoryLevel); in vegam_populate_all_memory_levels() 1046 smu_data->smc_state_table.MemoryLevel; in vegam_populate_all_memory_levels()
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | smu7_discrete.h | 311 SMU7_Discrete_MemoryLevel MemoryLevel [SMU7_MAX_LEVELS_MEMORY]; member
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D | ci_dpm.c | 3284 offsetof(SMU7_Discrete_DpmTable, MemoryLevel); in ci_populate_all_memory_levels() 3287 SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel; in ci_populate_all_memory_levels() 3297 &pi->smc_state_table.MemoryLevel[i]); in ci_populate_all_memory_levels() 3302 pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; in ci_populate_all_memory_levels() 3306 pi->smc_state_table.MemoryLevel[1].MinVddc = in ci_populate_all_memory_levels() 3307 pi->smc_state_table.MemoryLevel[0].MinVddc; in ci_populate_all_memory_levels() 3308 pi->smc_state_table.MemoryLevel[1].MinVddcPhases = in ci_populate_all_memory_levels() 3309 pi->smc_state_table.MemoryLevel[0].MinVddcPhases; in ci_populate_all_memory_levels() 3312 pi->smc_state_table.MemoryLevel[0].ActivityLevel = cpu_to_be16(0x1F); in ci_populate_all_memory_levels() 3318 pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark = in ci_populate_all_memory_levels()
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/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/inc/ |
D | smu7_discrete.h | 325 SMU7_Discrete_MemoryLevel MemoryLevel [SMU7_MAX_LEVELS_MEMORY]; member
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D | smu71_discrete.h | 272 SMU71_Discrete_MemoryLevel MemoryLevel [SMU71_MAX_LEVELS_MEMORY]; member
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D | smu72_discrete.h | 267 SMU72_Discrete_MemoryLevel MemoryLevel[SMU72_MAX_LEVELS_MEMORY]; member
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D | smu74_discrete.h | 284 SMU74_Discrete_MemoryLevel MemoryLevel[SMU74_MAX_LEVELS_MEMORY]; member
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D | smu73_discrete.h | 241 SMU73_Discrete_MemoryLevel MemoryLevel[SMU73_MAX_LEVELS_MEMORY]; member
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D | smu75_discrete.h | 289 SMU75_Discrete_MemoryLevel MemoryLevel [SMU75_MAX_LEVELS_MEMORY]; member
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