Searched refs:MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL (Results 1 – 8 of 8) sorted by relevance
97 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
263 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
381 #define MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x00F0 0x02A0 0x0000 0x0 0x0 macro
341 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
313 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e /* ETH_A_(R)(G)MII_RX_DV(_ER) */
581 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
639 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1000
669 MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x1000