Searched refs:MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 (Results 1 – 7 of 7) sorted by relevance
22 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
127 fsl,pins = <MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0>;
219 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
284 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0 macro
530 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
803 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 /* LCD Power Enable */