Searched refs:MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 (Results 1 – 10 of 10) sorted by relevance
16 #define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0 macro
28 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
39 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
234 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
450 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17000
337 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x400120b0 /* PSOC_SWD_CLK */
312 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
724 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x100a0
593 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x400120b0>;
751 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */