Searched refs:MSCC_ANA_IP1_NXT_PROT_MASK2_UPPER (Results 1 – 2 of 2) sorted by relevance
296 #define MSCC_ANA_IP1_NXT_PROT_MASK2_UPPER 0x01b5 macro
580 vsc85xx_ts_write_csr(phydev, blk, MSCC_ANA_IP1_NXT_PROT_MASK2_UPPER, in vsc85xx_ip_cmp1_init()