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Searched refs:MPLL_AD_FUNC_CNTL (Results 1 – 16 of 16) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Drv740d.h45 #define MPLL_AD_FUNC_CNTL 0x624 macro
Drv740_dpm.c303 RREG32(MPLL_AD_FUNC_CNTL); in rv740_read_clock_registers()
Drv770d.h118 #define MPLL_AD_FUNC_CNTL 0x624 macro
Dnid.h560 #define MPLL_AD_FUNC_CNTL 0x624 macro
Dsid.h623 #define MPLL_AD_FUNC_CNTL 0x2bc0 macro
Dcikd.h746 #define MPLL_AD_FUNC_CNTL 0x2bc0 macro
Devergreend.h98 #define MPLL_AD_FUNC_CNTL 0x624 macro
Drv770_dpm.c1533 RREG32(MPLL_AD_FUNC_CNTL); in rv770_read_clock_registers()
Dni_dpm.c1189 ni_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in ni_read_clock_registers()
Dci_dpm.c1846 pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in ci_read_clock_registers()
Dsi_dpm.c3516 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in si_read_clock_registers()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h624 #define MPLL_AD_FUNC_CNTL 0xAF0 macro
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
Dci_smumgr.c1060 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
Dtonga_smumgr.c834 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, in tonga_calculate_mclk_params()
/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c4034 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in si_read_clock_registers()