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Searched refs:MP1_BASE__INST2_SEG1 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h472 #define MP1_BASE__INST2_SEG1 0 macro
Dnavi10_ip_offset.h534 #define MP1_BASE__INST2_SEG1 0 macro
Dvega20_ip_offset.h559 #define MP1_BASE__INST2_SEG1 0 macro
Dnavi14_ip_offset.h710 #define MP1_BASE__INST2_SEG1 0 macro
Dnavi12_ip_offset.h710 #define MP1_BASE__INST2_SEG1 0 macro
Ddimgrey_cavefish_ip_offset.h719 #define MP1_BASE__INST2_SEG1 0 macro
Dsienna_cichlid_ip_offset.h717 #define MP1_BASE__INST2_SEG1 0 macro
Dbeige_goby_ip_offset.h846 #define MP1_BASE__INST2_SEG1 0 macro
Drenoir_ip_offset.h960 #define MP1_BASE__INST2_SEG1 0 macro
Dvega10_ip_offset.h376 #define MP1_BASE__INST2_SEG1 0 macro
Dvangogh_ip_offset.h969 #define MP1_BASE__INST2_SEG1 0 macro
Dyellow_carp_offset.h890 #define MP1_BASE__INST2_SEG1 0 macro
Darct_ip_offset.h707 #define MP1_BASE__INST2_SEG1 0 macro
Daldebaran_ip_offset.h1018 #define MP1_BASE__INST2_SEG1 0 macro