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Searched refs:MP0_BASE__INST0_SEG2 (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h425 #define MP0_BASE__INST0_SEG2 0 macro
Dnavi10_ip_offset.h479 #define MP0_BASE__INST0_SEG2 0 macro
Dvega20_ip_offset.h504 #define MP0_BASE__INST0_SEG2 0 macro
Dnavi14_ip_offset.h657 #define MP0_BASE__INST0_SEG2 0x00E00000 macro
Dnavi12_ip_offset.h657 #define MP0_BASE__INST0_SEG2 0x00E00000 macro
Ddimgrey_cavefish_ip_offset.h657 #define MP0_BASE__INST0_SEG2 0x00E00000 macro
Dsienna_cichlid_ip_offset.h664 #define MP0_BASE__INST0_SEG2 0x00E00000 macro
Dbeige_goby_ip_offset.h784 #define MP0_BASE__INST0_SEG2 0x00E00000 macro
Drenoir_ip_offset.h907 #define MP0_BASE__INST0_SEG2 0x00DC0000 macro
Dvega10_ip_offset.h335 #define MP0_BASE__INST0_SEG2 0 macro
Dvangogh_ip_offset.h900 #define MP0_BASE__INST0_SEG2 0x00DC0000 macro
Dyellow_carp_offset.h828 #define MP0_BASE__INST0_SEG2 0x00DC0000 macro
Darct_ip_offset.h638 #define MP0_BASE__INST0_SEG2 0x0043FC00 macro
Daldebaran_ip_offset.h956 #define MP0_BASE__INST0_SEG2 0x00E00000 macro