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Searched refs:MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_3_3_0_sh_mask.h4029 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_2_0_0_sh_mask.h4940 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_3_0_1_sh_mask.h4717 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_3_0_2_sh_mask.h4562 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_4_1_0_sh_mask.h4478 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_3_0_0_sh_mask.h4726 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro
Dmmhub_2_3_0_sh_mask.h7094 #define MMVM_L2_CNTL__L2_PTE_CACHE_ADDR_MODE__SHIFT … macro