Searched refs:MLX5_MATCH_MISC_PARAMETERS_2 (Results 1 – 12 of 12) sorted by relevance
113 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in parse_tunnel()
1718 MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_tc_ct_alloc_pre_ct()
103 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_vlan_proto_fg_create()165 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_vlan_proto_filter_fg_create()223 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_mac_fg_create()344 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_egress_miss_fg_create()591 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_flow_with_esw_create()703 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_filter_flow_create()824 rule_spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_egress_miss_flow_create()
345 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_mcast_filter_fg_create()523 rule_spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_mcast_flow_with_esw_create()
120 spec->match_criteria_enable &= ~MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_eswitch_clear_rule_source_port()157 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_eswitch_set_rule_source_port()977 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_eswitch_add_send_to_vport_rule()1059 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_eswitch_add_send_to_vport_meta_rule()1141 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in peer_miss_rules_setup()1440 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in esw_add_restore_rule()1477 MLX5_MATCH_MISC_PARAMETERS_2 | match_params); in mlx5_esw_set_flow_group_source_port()1708 MLX5_MATCH_MISC_PARAMETERS_2); in esw_create_meta_send_to_vport_group()2127 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_set_spec_source_port()2293 MLX5_MATCH_MISC_PARAMETERS_2); in esw_create_restore_table()
227 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5e_tc_match_to_reg_match()
302 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in macsec_fs_tx_create_crypto_table_groups()517 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_tx_create()594 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_tx_setup_fte()1171 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_rx_create_check_decap_rule()2165 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_macsec_fs_add_roce_rule_rx()
84 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5e_int_port_create_rx_rule()
94 MLX5_MATCH_MISC_PARAMETERS_2); in mlx5e_post_meter_rate_fg_create()
101 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2 | MLX5_MATCH_OUTER_HEADERS; in mlx5_ct_fs_smfs_matcher_create()
207 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in rx_add_rule_drop_auth_trailer()287 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in rx_add_rule_drop_replay()403 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in ipsec_rx_status_pass_create()1244 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in setup_fte_reg_a()1255 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in setup_fte_reg_c4()
1162 MLX5_MATCH_MISC_PARAMETERS_2 = 1 << 3, enumerator