Searched refs:MLX5_FLOW_CONTEXT_ACTION_MOD_HDR (Results 1 – 22 of 22) sorted by relevance
18 if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) { in csum_offload_supported()
48 *action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_act_vlan_add_rewrite_action()
136 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_act_set_next_post_act()
100 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in tc_act_parse_pedit()
79 flow_act->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_esw_ipsec_rx_setup_modify_header()
137 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_esw_indir_table_rule_get()
607 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_esw_bridge_ingress_flow_with_esw_create()
47 flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in esw_acl_ingress_prio_tag_create()96 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | MLX5_FLOW_CONTEXT_ACTION_ALLOW; in esw_acl_ingress_mod_metadata_create()
1289 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) in mlx5e_add_offloaded_nic_rule()1383 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { in mlx5e_tc_add_nic_flow()1434 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { in mlx5e_tc_del_nic_flow()1538 slow_attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_offload_to_slow_path()1587 slow_attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_unoffload_from_slow_path()1720 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR && in verify_attr_actions()1875 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { in post_process_attr()1882 attr->branch_true->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { in post_process_attr()1889 attr->branch_false->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { in post_process_attr()1964 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_add_fdb_flow()[all …]
713 if ((flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) && in mlx5_eswitch_add_offloaded_rule()736 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) in mlx5_eswitch_add_offloaded_rule()1442 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in esw_add_restore_rule()
1906 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | in check_conflicting_actions()1917 if (action1 & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR && in check_conflicting_actions()
173 {MLX5_FLOW_CONTEXT_ACTION_MOD_HDR, "MOD_HDR"},\
835 attr->action = MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | in mlx5_tc_ct_entry_add_rule()1615 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in tc_ct_pre_ct_add_rules()1991 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in __mlx5_tc_ct_flow_offload()2022 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_tc_ct_flow_offload()
734 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_set_vf_tunnel()
1361 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; in macsec_fs_rx_roce_jump_to_rdma_rules_create()1788 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in macsec_fs_rx_add_rule()1813 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in macsec_fs_rx_add_rule()2238 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_macsec_fs_add_roce_rule_tx()
388 act.action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5_chains_add_miss_rule()
546 pre_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in mlx5e_tc_sample_offload()
373 if (fte->act_dests.action.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) in mlx5_cmd_dr_create_fte()
338 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR); in mlx5dr_cmd_set_fte_modify_and_vport()
152 if (action->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) in parse_flow_flow_action()154 action->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in parse_flow_flow_action()
1368 flow_act->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; in setup_modify_header()
3721 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40, enumerator