/linux-6.12.1/drivers/vfio/platform/reset/ |
D | vfio_platform_amdxgbe.c | 69 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1); in vfio_platform_amdxgbe_reset() 71 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1, pcs_value); in vfio_platform_amdxgbe_reset() 77 MDIO_CTRL1); in vfio_platform_amdxgbe_reset() 85 value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1); in vfio_platform_amdxgbe_reset() 87 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1, value); in vfio_platform_amdxgbe_reset()
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/linux-6.12.1/drivers/net/ethernet/sfc/falcon/ |
D | mdio_10g.c | 39 ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); in ef4_mdio_reset_mmd() 43 ctrl = ef4_mdio_read(port, mmd, MDIO_CTRL1); in ef4_mdio_reset_mmd() 86 stat = ef4_mdio_read(efx, mmd, MDIO_CTRL1); in ef4_mdio_wait_reset_mmds() 188 MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK, in ef4_mdio_phy_reconfigure() 191 MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK, in ef4_mdio_phy_reconfigure() 194 MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK, in ef4_mdio_phy_reconfigure() 207 ef4_mdio_set_flag(efx, mmd, MDIO_CTRL1, in ef4_mdio_set_mmd_lpower() 291 reg = ef4_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1); in ef4_mdio_an_reconfigure() 293 ef4_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg); in ef4_mdio_an_reconfigure()
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D | qt202x_phy.c | 204 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, in qt2025c_bug17190_workaround() 207 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, in qt2025c_bug17190_workaround()
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/ |
D | aq100x.c | 123 MDIO_MMD_PMAPMD, MDIO_CTRL1, in aq100x_power_down() 134 MDIO_MMD_AN, MDIO_CTRL1, in aq100x_autoneg_enable() 147 MDIO_MMD_AN, MDIO_CTRL1, in aq100x_autoneg_restart() 197 MDIO_MMD_PMAPMD, MDIO_CTRL1, in aq100x_set_loopback() 292 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep() 328 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep() 332 err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1, in t3_aq100x_phy_prep()
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D | ael1002.c | 148 MDIO_MMD_PMAPMD, MDIO_CTRL1, in ael1002_power_down()
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D | t3_hw.c | 358 err = t3_mdio_change_bits(phy, mmd, MDIO_CTRL1, MDIO_CTRL1_LPOWER, in t3_phy_reset() 364 err = t3_mdio_read(phy, mmd, MDIO_CTRL1, &ctl); in t3_phy_reset()
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/linux-6.12.1/drivers/net/ethernet/amd/xgbe/ |
D | xgbe-phy-v1.c | 322 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_pcs_power_cycle() 325 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle() 330 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle() 378 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kr_mode() 381 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_kr_mode() 421 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kx_2500_mode() 424 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_kx_2500_mode() 464 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kx_1000_mode() 467 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_kx_1000_mode() 657 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_reset() [all …]
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D | xgbe-platform.c | 498 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_platform_suspend() 500 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_suspend() 516 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_resume()
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D | xgbe-mdio.c | 368 reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_CTRL1); in xgbe_an37_set() 377 XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_CTRL1, reg); in xgbe_an37_set() 407 reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1); in xgbe_an73_set() 416 XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg); in xgbe_an73_set() 1556 dev_dbg(dev, "PCS Control Reg (%#06x) = %#06x\n", MDIO_CTRL1, in xgbe_dump_phy_registers() 1557 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1)); in xgbe_dump_phy_registers() 1569 dev_dbg(dev, "Auto-Neg Control Reg (%#06x) = %#06x\n", MDIO_CTRL1, in xgbe_dump_phy_registers() 1570 XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1)); in xgbe_dump_phy_registers()
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D | xgbe-pci.c | 446 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_pci_suspend() 448 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_suspend() 462 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_resume()
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/linux-6.12.1/drivers/net/pcs/ |
D | pcs-xpcs.c | 251 ret = xpcs_read(xpcs, dev, MDIO_CTRL1); in xpcs_poll_reset() 278 ret = xpcs_write(xpcs, dev, MDIO_CTRL1, MDIO_CTRL1_RESET); in xpcs_soft_reset() 367 ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1); in xpcs_config_usxgmii() 371 ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_EN); in xpcs_config_usxgmii() 375 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1); in xpcs_config_usxgmii() 382 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret); in xpcs_config_usxgmii() 386 ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1); in xpcs_config_usxgmii() 390 ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST); in xpcs_config_usxgmii() 454 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_CTRL1); in xpcs_config_aneg_c73() 460 return xpcs_write(xpcs, MDIO_MMD_AN, MDIO_CTRL1, ret); in xpcs_config_aneg_c73() [all …]
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D | pcs-xpcs-wx.c | 197 val = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_CTRL1); in txgbe_xpcs_switch_mode() 199 xpcs_write(xpcs, MDIO_MMD_PMAPMD, MDIO_CTRL1, val); in txgbe_xpcs_switch_mode() 203 xpcs_write(xpcs, MDIO_MMD_PMAPMD, MDIO_CTRL1, 0); in txgbe_xpcs_switch_mode() 204 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL1, 0); in txgbe_xpcs_switch_mode()
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/linux-6.12.1/drivers/net/phy/ |
D | marvell-88q2xxx.c | 107 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 111 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0 }, 112 { MDIO_MMD_PCS, MDIO_CTRL1, 0x0 }, 138 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0840 }, 144 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0840 }, 556 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_suspend() 572 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_resume()
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D | phy-c45.c | 56 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_resume() 70 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_suspend() 117 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced() 167 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); in genphy_c45_pma_setup_forced() 321 u16 reg = MDIO_CTRL1; in genphy_c45_an_disable_aneg() 341 u16 reg = MDIO_CTRL1; in genphy_c45_restart_aneg() 362 u16 reg = MDIO_CTRL1; in genphy_c45_check_and_restart_aneg() 425 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link() 605 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_read_pma() 1235 return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, in genphy_c45_loopback()
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D | bcm84881.c | 27 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in bcm84881_wait_init() 146 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status()
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D | marvell10g.c | 357 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, unit + MDIO_CTRL1, in mv3310_reset() 363 unit + MDIO_CTRL1, val, in mv3310_reset()
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D | bcm7xxx.c | 606 case MDIO_CTRL1: in bcm7xxx_28nm_ephy_regnum_to_shd()
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D | adin.c | 206 { MDIO_MMD_PCS, MDIO_CTRL1, ADIN1300_CLOCK_STOP_REG },
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D | phy.c | 1618 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, in phy_init_eee()
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/linux-6.12.1/drivers/net/ |
D | mdio.c | 142 mdio_set_flag(mdio, mdio->prtad, MDIO_MMD_AN, MDIO_CTRL1, in mdio45_nway_restart() 260 MDIO_CTRL1); in mdio45_ethtool_gset_npage() 312 MDIO_CTRL1); in mdio45_ethtool_gset_npage() 431 MDIO_CTRL1); in mdio45_ethtool_ksettings_get_npage() 484 MDIO_CTRL1); in mdio45_ethtool_ksettings_get_npage()
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/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/ |
D | ixgbe_phy.c | 421 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic() 444 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic() 1159 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic() 1164 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic() 1388 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx() 1393 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx() 1415 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl() 1418 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl() 1422 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl() 2808 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power() [all …]
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/linux-6.12.1/drivers/net/dsa/mv88e6xxx/ |
D | serdes.h | 47 #define MV88E6390_10G_CTRL1 (0x1000 + MDIO_CTRL1)
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/linux-6.12.1/include/uapi/linux/ |
D | mdio.h | 32 #define MDIO_CTRL1 MII_BMCR macro
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/linux-6.12.1/drivers/net/phy/aquantia/ |
D | aquantia_main.c | 626 err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_suspend() 638 err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_resume()
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/linux-6.12.1/drivers/net/dsa/sja1105/ |
D | sja1105_main.c | 2322 MDIO_MMD_VEND2, MDIO_CTRL1); in sja1105_static_config_reload()
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