Searched refs:MC_SEQ_WR_CTL_D1_LP (Results 1 – 12 of 12) sorted by relevance
152 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
1852 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in btc_check_s0_mc_reg_index()2007 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()
810 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
578 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
703 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
328 #define MC_SEQ_WR_CTL_D1_LP 0x2a80 macro
2798 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in ni_check_s0_mc_reg_index()2894 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()
1002 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D1_LP >> 2; in cypress_set_mc_reg_address_table()
4408 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in ci_check_s0_mc_reg_index()4606 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
5389 *out_reg = MC_SEQ_WR_CTL_D1_LP >> 2; in si_check_s0_mc_reg_index()5489 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()
579 #define MC_SEQ_WR_CTL_D1_LP 0xAA0 macro
5922 *out_reg = MC_SEQ_WR_CTL_D1_LP; in si_check_s0_mc_reg_index()6022 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()