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Searched refs:MC_SEQ_MISC_TIMING2_LP (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Dbtcd.h150 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
Dbtc_dpm.c1840 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in btc_check_s0_mc_reg_index()
2003 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in btc_initialize_mc_reg_table()
Dnid.h808 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
Dsid.h576 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
Dcikd.h701 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
Devergreend.h326 #define MC_SEQ_MISC_TIMING2_LP 0x2a78 macro
Dni_dpm.c2786 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ni_check_s0_mc_reg_index()
2889 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c986 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2; in cypress_set_mc_reg_address_table()
Dci_dpm.c4390 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in ci_check_s0_mc_reg_index()
4601 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ci_initialize_mc_reg_table()
Dsi_dpm.c5377 *out_reg = MC_SEQ_MISC_TIMING2_LP >> 2; in si_check_s0_mc_reg_index()
5484 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h577 #define MC_SEQ_MISC_TIMING2_LP 0xA9E macro
/linux-6.12.1/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5910 *out_reg = MC_SEQ_MISC_TIMING2_LP; in si_check_s0_mc_reg_index()
6017 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in si_initialize_mc_reg_table()