Searched refs:MC_SEQ_MISC0 (Results 1 – 13 of 13) sorted by relevance
119 #define MC_SEQ_MISC0 0x2a00 macro
209 #define MC_SEQ_MISC0 0x2a00 macro790 #define MC_SEQ_MISC0 0x2a00 macro
285 #define MC_SEQ_MISC0 0x2a00 macro
551 #define MC_SEQ_MISC0 0x2a00 macro
676 #define MC_SEQ_MISC0 0x2a00 macro
733 tmp = RREG32(MC_SEQ_MISC0) & 3; in rv770_calculate_memory_refresh_rate()1596 tmp = RREG32(MC_SEQ_MISC0); in rv770_get_memory_type()
652 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
2459 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_arb()4497 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_seq()5054 tmp = RREG32(MC_SEQ_MISC0); in ci_get_memory_type()
1756 if (((RREG32(MC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58) in si_init_microcode()5822 tmp = RREG32(MC_SEQ_MISC0); in si_lbpw_supported()
3147 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()4222 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()
1920 tmp = RREG32(MC_SEQ_MISC0); in ci_mc_load_microcode()
552 #define MC_SEQ_MISC0 0xA80 macro
3664 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()4745 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()