/linux-6.12.1/drivers/tty/ |
D | amiserial.c | 83 int MCR; /* Modem control register */ member 490 info->MCR = 0; in startup() 492 info->MCR = SER_DTR | SER_RTS; in startup() 493 rtsdtr_ctrl(info->MCR); in startup() 552 info->MCR &= ~(SER_DTR|SER_RTS); in shutdown() 553 rtsdtr_ctrl(info->MCR); in shutdown() 858 info->MCR &= ~SER_RTS; in rs_throttle() 861 rtsdtr_ctrl(info->MCR); in rs_throttle() 880 info->MCR |= SER_RTS; in rs_unthrottle() 882 rtsdtr_ctrl(info->MCR); in rs_unthrottle() [all …]
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D | mxser.c | 266 u8 MCR; /* Modem control register */ member 513 info->MCR |= UART_MCR_DTR; in mxser_set_baud() 514 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud() 516 info->MCR &= ~UART_MCR_DTR; in mxser_set_baud() 517 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud() 625 info->MCR &= ~UART_MCR_AFE; in mxser_change_speed() 630 info->MCR |= UART_MCR_AFE; in mxser_change_speed() 636 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_change_speed() 776 info->MCR = UART_MCR_DTR | UART_MCR_RTS; in mxser_activate() 777 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_activate() [all …]
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/linux-6.12.1/arch/sh/boards/mach-hp6xx/ |
D | pm.c | 29 #define MCR 0xffffff68 macro 64 mcr = __raw_readw(MCR); in pm_enter() 65 __raw_writew(mcr & ~MCR_RFSH, MCR); in pm_enter() 76 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR); in pm_enter()
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/linux-6.12.1/drivers/atm/ |
D | idt77105.c | 135 PUT( walk->old_mcr ,MCR); in idt77105_restart_timer_func() 231 PRIV(dev)->old_mcr = GET(MCR); in idt77105_int() 237 ) & ~IDT77105_MCR_EIP, MCR); in idt77105_int() 296 PRIV(dev)->old_mcr = GET(MCR); in idt77105_start() 299 PUT(PRIV(dev)->old_mcr, MCR); in idt77105_start() 328 PUT( GET(MCR) & ~IDT77105_MCR_EIP, MCR ); in idt77105_stop()
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D | iphase.h | 172 #define MCR 0 macro
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/linux-6.12.1/Documentation/gpu/xe/ |
D | xe_gt_mcr.rst | 4 GT Multicast/Replicated (MCR) Register Support 8 :doc: GT Multicast/Replicated (MCR) Register Support
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/linux-6.12.1/drivers/net/hamradio/ |
D | baycom_ser_fdx.c | 98 #define MCR(iobase) (iobase+4) macro 290 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_interrupt() 292 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_interrupt() 348 b1 = inb(MCR(iobase)); in ser12_check_uart() 349 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart() 351 outb(0x1a, MCR(iobase)); in ser12_check_uart() 353 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart() 407 outb(0x0d, MCR(dev->base_addr)); in ser12_open() 450 outb(1, MCR(dev->base_addr)); in ser12_close()
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D | baycom_ser_hdx.c | 84 #define MCR(iobase) (iobase+4) macro 193 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_tx() 339 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_rx() 430 b1 = inb(MCR(iobase)); in ser12_check_uart() 431 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart() 433 outb(0x1a, MCR(iobase)); in ser12_check_uart() 435 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart() 475 outb(0x0d, MCR(dev->base_addr)); in ser12_open() 509 outb(1, MCR(dev->base_addr)); in ser12_close()
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D | yam.c | 155 #define MCR(iobase) (iobase+4) macro 302 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset() 305 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset() 321 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_write() 470 outb(PTT_OFF, MCR(dev->base_addr)); in yam_set_uart() 501 b1 = inb(MCR(iobase)); in yam_check_uart() 502 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in yam_check_uart() 504 outb(0x1a, MCR(iobase)); in yam_check_uart() 506 outb(b1, MCR(iobase)); /* restore old values */ in yam_check_uart() 572 outb(PTT_ON, MCR(dev->base_addr)); in ptt_on() [all …]
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/linux-6.12.1/arch/x86/boot/ |
D | early_serial_console.c | 18 #define MCR 4 /* Modem control */ macro 34 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
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/linux-6.12.1/drivers/dma/ |
D | txx9dmac.h | 96 TXX9_DMA_REG32(MCR); /* Master Control Register */ 102 u32 MCR; member
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D | txx9dmac.c | 651 mcr = dma_readl(ddev, MCR); in txx9dmac_tasklet() 676 dma_readl(ddev, MCR)); in txx9dmac_interrupt() 1077 dma_writel(ddev, MCR, 0); in txx9dmac_off() 1211 dma_writel(ddev, MCR, mcr); in txx9dmac_probe() 1252 dma_writel(ddev, MCR, mcr); in txx9dmac_resume_noirq()
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/linux-6.12.1/arch/x86/kernel/ |
D | early_printk.c | 91 #define MCR 4 /* Modem control */ macro 137 serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */ in early_serial_hw_init()
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/linux-6.12.1/arch/arm/mach-orion5x/ |
D | tsx09-common.c | 38 writel(0x00, UART1_REG(MCR)); in qnap_tsx09_power_off()
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D | terastation_pro2-setup.c | 281 writel(0x00, UART1_REG(MCR)); in tsp2_power_off()
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D | kurobox_pro-setup.c | 303 writel(0x00, UART1_REG(MCR)); in kurobox_pro_power_off()
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/linux-6.12.1/drivers/usb/serial/ |
D | io_16654.h | 36 #define MCR 4 // Modem Control Register macro
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D | io_edgeport.c | 1395 status = send_cmd_write_uart_register(edge_port, MCR, in edge_throttle() 1432 send_cmd_write_uart_register(edge_port, MCR, in edge_unthrottle() 1515 send_cmd_write_uart_register(edge_port, MCR, edge_port->shadowMCR); in edge_tiocmset() 2287 (regNum == MCR) ? "MCR" : "LCR", __func__, regValue); in send_cmd_write_uart_register() 2291 regNum == MCR) { in send_cmd_write_uart_register() 2471 status = send_cmd_write_uart_register(edge_port, MCR, in change_port_settings()
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/linux-6.12.1/drivers/power/reset/ |
D | qnap-poweroff.c | 66 writel(0x00, UART1_REG(MCR)); in qnap_power_off()
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/linux-6.12.1/drivers/net/ethernet/smsc/ |
D | smc9194.h | 93 #define MCR 10 macro
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D | smc9194.c | 937 memory_cfg_register = inw( ioaddr + MCR ); in smc_probe()
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/linux-6.12.1/arch/arm/include/asm/ |
D | vfpmacros.h | 26 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
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/linux-6.12.1/Documentation/misc-devices/ |
D | oxsemi-tornado.rst | 30 setting bit 4 of the EFR. In that mode setting bit 7 in the MCR enables
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/linux-6.12.1/drivers/bluetooth/ |
D | btnxpuart.c | 269 #define MCR 0x00000022 macro 680 uart_config.mcr.value = __cpu_to_le32(MCR); in nxp_fw_change_baudrate()
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/linux-6.12.1/Documentation/gpu/ |
D | i915.rst | 258 Multicast/Replicated (MCR) Registers 262 :doc: GT Multicast/Replicated (MCR) Register Support
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