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Searched refs:MAX_INSTANCE (Results 1 – 25 of 25) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c32 #define MAX_INSTANCE 5 macro
40 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_smu.c34 #define MAX_INSTANCE 7 macro
42 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Ddcn316_clk_mgr.c45 #define MAX_INSTANCE 7 macro
53 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_smu.c34 #define MAX_INSTANCE 6 macro
43 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.12.1/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dnavi10_ip_offset.h24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dvega20_ip_offset.h24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dnavi14_ip_offset.h24 #define MAX_INSTANCE 7 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dnavi12_ip_offset.h24 #define MAX_INSTANCE 7 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Ddimgrey_cavefish_ip_offset.h24 #define MAX_INSTANCE 7 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dsienna_cichlid_ip_offset.h24 #define MAX_INSTANCE 7 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dbeige_goby_ip_offset.h25 #define MAX_INSTANCE 7 macro
34 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Drenoir_ip_offset.h24 #define MAX_INSTANCE 7 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dvega10_ip_offset.h24 #define MAX_INSTANCE 5 macro
32 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dvangogh_ip_offset.h27 #define MAX_INSTANCE 8 macro
36 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dyellow_carp_offset.h6 #define MAX_INSTANCE 7 macro
15 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Darct_ip_offset.h24 #define MAX_INSTANCE 8 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Daldebaran_ip_offset.h24 #define MAX_INSTANCE 7 macro
32 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Ddimgrey_cavefish_reg_init.c34 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in dimgrey_cavefish_reg_base_init()
Daldebaran_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in aldebaran_reg_base_init()
Darct_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in arct_reg_base_init()
Dvega10_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega10_reg_base_init()
Dvega20_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega20_reg_base_init()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c61 #define MAX_INSTANCE 7 macro
69 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn314/
Ddcn314_resource.c111 #define MAX_INSTANCE 7 macro