Searched refs:MASK_IQK_RESULT (Results 1 – 2 of 2) sorted by relevance
1089 rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_A_2, MASK_IQK_RESULT) == 0) { in _rtl92du_phy_patha_iqk_5g_normal()1237 rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_B_2, MASK_IQK_RESULT) == 0) { in _rtl92du_phy_pathb_iqk_5g_normal()1432 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1434 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1436 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1438 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1446 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1448 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1465 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()1467 MASK_IQK_RESULT); in _rtl92du_phy_iq_calibrate()[all …]
1296 #define MASK_IQK_RESULT 0x03ff0000 macro