1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Universal Flash Storage Host controller driver 4 * Copyright (C) 2011-2013 Samsung India Software Operations 5 * 6 * Authors: 7 * Santosh Yaraganavi <santosh.sy@samsung.com> 8 * Vinayak Holikatti <h.vinayak@samsung.com> 9 */ 10 11 #ifndef _UFS_H 12 #define _UFS_H 13 14 #include <linux/bitops.h> 15 #include <linux/types.h> 16 #include <uapi/scsi/scsi_bsg_ufs.h> 17 #include <linux/time64.h> 18 19 /* 20 * Using static_assert() is not allowed in UAPI header files. Hence the check 21 * in this header file of the size of struct utp_upiu_header. 22 */ 23 static_assert(sizeof(struct utp_upiu_header) == 12); 24 25 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req)) 26 #define QUERY_DESC_MAX_SIZE 255 27 #define QUERY_DESC_MIN_SIZE 2 28 #define QUERY_DESC_HDR_SIZE 2 29 #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \ 30 (sizeof(struct utp_upiu_header))) 31 #define UFS_SENSE_SIZE 18 32 33 /* 34 * UFS device may have standard LUs and LUN id could be from 0x00 to 35 * 0x7F. Standard LUs use "Peripheral Device Addressing Format". 36 * UFS device may also have the Well Known LUs (also referred as W-LU) 37 * which again could be from 0x00 to 0x7F. For W-LUs, device only use 38 * the "Extended Addressing Format" which means the W-LUNs would be 39 * from 0xc100 (SCSI_W_LUN_BASE) onwards. 40 * This means max. LUN number reported from UFS device could be 0xC17F. 41 */ 42 #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F 43 #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID) 44 #define UFS_UPIU_WLUN_ID (1 << 7) 45 46 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */ 47 #define UFS_UPIU_MAX_WB_LUN_ID 8 48 49 /* 50 * WriteBooster buffer lifetime has a limit setted by vendor. 51 * If it is over the limit, WriteBooster feature will be disabled. 52 */ 53 #define UFS_WB_EXCEED_LIFETIME 0x0B 54 55 /* 56 * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet 57 */ 58 #define EHS_OFFSET_IN_RESPONSE 32 59 60 /* Well known logical unit id in LUN field of UPIU */ 61 enum { 62 UFS_UPIU_REPORT_LUNS_WLUN = 0x81, 63 UFS_UPIU_UFS_DEVICE_WLUN = 0xD0, 64 UFS_UPIU_BOOT_WLUN = 0xB0, 65 UFS_UPIU_RPMB_WLUN = 0xC4, 66 }; 67 68 /* 69 * UFS Protocol Information Unit related definitions 70 */ 71 72 /* Task management functions */ 73 enum { 74 UFS_ABORT_TASK = 0x01, 75 UFS_ABORT_TASK_SET = 0x02, 76 UFS_CLEAR_TASK_SET = 0x04, 77 UFS_LOGICAL_RESET = 0x08, 78 UFS_QUERY_TASK = 0x80, 79 UFS_QUERY_TASK_SET = 0x81, 80 }; 81 82 /* UTP UPIU Transaction Codes Initiator to Target */ 83 enum upiu_request_transaction { 84 UPIU_TRANSACTION_NOP_OUT = 0x00, 85 UPIU_TRANSACTION_COMMAND = 0x01, 86 UPIU_TRANSACTION_DATA_OUT = 0x02, 87 UPIU_TRANSACTION_TASK_REQ = 0x04, 88 UPIU_TRANSACTION_QUERY_REQ = 0x16, 89 }; 90 91 /* UTP UPIU Transaction Codes Target to Initiator */ 92 enum upiu_response_transaction { 93 UPIU_TRANSACTION_NOP_IN = 0x20, 94 UPIU_TRANSACTION_RESPONSE = 0x21, 95 UPIU_TRANSACTION_DATA_IN = 0x22, 96 UPIU_TRANSACTION_TASK_RSP = 0x24, 97 UPIU_TRANSACTION_READY_XFER = 0x31, 98 UPIU_TRANSACTION_QUERY_RSP = 0x36, 99 UPIU_TRANSACTION_REJECT_UPIU = 0x3F, 100 }; 101 102 /* UPIU Read/Write flags. See also table "UPIU Flags" in the UFS standard. */ 103 enum { 104 UPIU_CMD_FLAGS_NONE = 0x00, 105 UPIU_CMD_FLAGS_CP = 0x04, 106 UPIU_CMD_FLAGS_WRITE = 0x20, 107 UPIU_CMD_FLAGS_READ = 0x40, 108 }; 109 110 /* UPIU response flags */ 111 enum { 112 UPIU_RSP_FLAG_UNDERFLOW = 0x20, 113 UPIU_RSP_FLAG_OVERFLOW = 0x40, 114 }; 115 116 /* UPIU Task Attributes */ 117 enum { 118 UPIU_TASK_ATTR_SIMPLE = 0x00, 119 UPIU_TASK_ATTR_ORDERED = 0x01, 120 UPIU_TASK_ATTR_HEADQ = 0x02, 121 UPIU_TASK_ATTR_ACA = 0x03, 122 }; 123 124 /* UPIU Query request function */ 125 enum { 126 UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01, 127 UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81, 128 }; 129 130 /* Flag idn for Query Requests*/ 131 enum flag_idn { 132 QUERY_FLAG_IDN_FDEVICEINIT = 0x01, 133 QUERY_FLAG_IDN_PERMANENT_WPE = 0x02, 134 QUERY_FLAG_IDN_PWR_ON_WPE = 0x03, 135 QUERY_FLAG_IDN_BKOPS_EN = 0x04, 136 QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE = 0x05, 137 QUERY_FLAG_IDN_PURGE_ENABLE = 0x06, 138 QUERY_FLAG_IDN_RESERVED2 = 0x07, 139 QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL = 0x08, 140 QUERY_FLAG_IDN_BUSY_RTC = 0x09, 141 QUERY_FLAG_IDN_RESERVED3 = 0x0A, 142 QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B, 143 QUERY_FLAG_IDN_WB_EN = 0x0E, 144 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F, 145 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10, 146 QUERY_FLAG_IDN_HPB_RESET = 0x11, 147 QUERY_FLAG_IDN_HPB_EN = 0x12, 148 }; 149 150 /* Attribute idn for Query requests */ 151 enum attr_idn { 152 QUERY_ATTR_IDN_BOOT_LU_EN = 0x00, 153 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD = 0x01, 154 QUERY_ATTR_IDN_POWER_MODE = 0x02, 155 QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03, 156 QUERY_ATTR_IDN_OOO_DATA_EN = 0x04, 157 QUERY_ATTR_IDN_BKOPS_STATUS = 0x05, 158 QUERY_ATTR_IDN_PURGE_STATUS = 0x06, 159 QUERY_ATTR_IDN_MAX_DATA_IN = 0x07, 160 QUERY_ATTR_IDN_MAX_DATA_OUT = 0x08, 161 QUERY_ATTR_IDN_DYN_CAP_NEEDED = 0x09, 162 QUERY_ATTR_IDN_REF_CLK_FREQ = 0x0A, 163 QUERY_ATTR_IDN_CONF_DESC_LOCK = 0x0B, 164 QUERY_ATTR_IDN_MAX_NUM_OF_RTT = 0x0C, 165 QUERY_ATTR_IDN_EE_CONTROL = 0x0D, 166 QUERY_ATTR_IDN_EE_STATUS = 0x0E, 167 QUERY_ATTR_IDN_SECONDS_PASSED = 0x0F, 168 QUERY_ATTR_IDN_CNTX_CONF = 0x10, 169 QUERY_ATTR_IDN_CORR_PRG_BLK_NUM = 0x11, 170 QUERY_ATTR_IDN_RESERVED2 = 0x12, 171 QUERY_ATTR_IDN_RESERVED3 = 0x13, 172 QUERY_ATTR_IDN_FFU_STATUS = 0x14, 173 QUERY_ATTR_IDN_PSA_STATE = 0x15, 174 QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16, 175 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17, 176 QUERY_ATTR_IDN_CASE_ROUGH_TEMP = 0x18, 177 QUERY_ATTR_IDN_HIGH_TEMP_BOUND = 0x19, 178 QUERY_ATTR_IDN_LOW_TEMP_BOUND = 0x1A, 179 QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C, 180 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D, 181 QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E, 182 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F, 183 QUERY_ATTR_IDN_EXT_IID_EN = 0x2A, 184 QUERY_ATTR_IDN_TIMESTAMP = 0x30 185 }; 186 187 /* Descriptor idn for Query requests */ 188 enum desc_idn { 189 QUERY_DESC_IDN_DEVICE = 0x0, 190 QUERY_DESC_IDN_CONFIGURATION = 0x1, 191 QUERY_DESC_IDN_UNIT = 0x2, 192 QUERY_DESC_IDN_RFU_0 = 0x3, 193 QUERY_DESC_IDN_INTERCONNECT = 0x4, 194 QUERY_DESC_IDN_STRING = 0x5, 195 QUERY_DESC_IDN_RFU_1 = 0x6, 196 QUERY_DESC_IDN_GEOMETRY = 0x7, 197 QUERY_DESC_IDN_POWER = 0x8, 198 QUERY_DESC_IDN_HEALTH = 0x9, 199 QUERY_DESC_IDN_MAX, 200 }; 201 202 enum desc_header_offset { 203 QUERY_DESC_LENGTH_OFFSET = 0x00, 204 QUERY_DESC_DESC_TYPE_OFFSET = 0x01, 205 }; 206 207 /* Unit descriptor parameters offsets in bytes*/ 208 enum unit_desc_param { 209 UNIT_DESC_PARAM_LEN = 0x0, 210 UNIT_DESC_PARAM_TYPE = 0x1, 211 UNIT_DESC_PARAM_UNIT_INDEX = 0x2, 212 UNIT_DESC_PARAM_LU_ENABLE = 0x3, 213 UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4, 214 UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5, 215 UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6, 216 UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7, 217 UNIT_DESC_PARAM_MEM_TYPE = 0x8, 218 UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9, 219 UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA, 220 UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB, 221 UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13, 222 UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17, 223 UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18, 224 UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20, 225 UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22, 226 UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS = 0x23, 227 UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF = 0x25, 228 UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS = 0x27, 229 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29, 230 }; 231 232 /* RPMB Unit descriptor parameters offsets in bytes*/ 233 enum rpmb_unit_desc_param { 234 RPMB_UNIT_DESC_PARAM_LEN = 0x0, 235 RPMB_UNIT_DESC_PARAM_TYPE = 0x1, 236 RPMB_UNIT_DESC_PARAM_UNIT_INDEX = 0x2, 237 RPMB_UNIT_DESC_PARAM_LU_ENABLE = 0x3, 238 RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4, 239 RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5, 240 RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6, 241 RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7, 242 RPMB_UNIT_DESC_PARAM_MEM_TYPE = 0x8, 243 RPMB_UNIT_DESC_PARAM_REGION_EN = 0x9, 244 RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA, 245 RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB, 246 RPMB_UNIT_DESC_PARAM_REGION0_SIZE = 0x13, 247 RPMB_UNIT_DESC_PARAM_REGION1_SIZE = 0x14, 248 RPMB_UNIT_DESC_PARAM_REGION2_SIZE = 0x15, 249 RPMB_UNIT_DESC_PARAM_REGION3_SIZE = 0x16, 250 RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17, 251 RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18, 252 }; 253 254 /* Device descriptor parameters offsets in bytes*/ 255 enum device_desc_param { 256 DEVICE_DESC_PARAM_LEN = 0x0, 257 DEVICE_DESC_PARAM_TYPE = 0x1, 258 DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2, 259 DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3, 260 DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4, 261 DEVICE_DESC_PARAM_PRTCL = 0x5, 262 DEVICE_DESC_PARAM_NUM_LU = 0x6, 263 DEVICE_DESC_PARAM_NUM_WLU = 0x7, 264 DEVICE_DESC_PARAM_BOOT_ENBL = 0x8, 265 DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9, 266 DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA, 267 DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB, 268 DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC, 269 DEVICE_DESC_PARAM_SEC_LU = 0xD, 270 DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE, 271 DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF, 272 DEVICE_DESC_PARAM_SPEC_VER = 0x10, 273 DEVICE_DESC_PARAM_MANF_DATE = 0x12, 274 DEVICE_DESC_PARAM_MANF_NAME = 0x14, 275 DEVICE_DESC_PARAM_PRDCT_NAME = 0x15, 276 DEVICE_DESC_PARAM_SN = 0x16, 277 DEVICE_DESC_PARAM_OEM_ID = 0x17, 278 DEVICE_DESC_PARAM_MANF_ID = 0x18, 279 DEVICE_DESC_PARAM_UD_OFFSET = 0x1A, 280 DEVICE_DESC_PARAM_UD_LEN = 0x1B, 281 DEVICE_DESC_PARAM_RTT_CAP = 0x1C, 282 DEVICE_DESC_PARAM_FRQ_RTC = 0x1D, 283 DEVICE_DESC_PARAM_UFS_FEAT = 0x1F, 284 DEVICE_DESC_PARAM_FFU_TMT = 0x20, 285 DEVICE_DESC_PARAM_Q_DPTH = 0x21, 286 DEVICE_DESC_PARAM_DEV_VER = 0x22, 287 DEVICE_DESC_PARAM_NUM_SEC_WPA = 0x24, 288 DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25, 289 DEVICE_DESC_PARAM_PSA_TMT = 0x29, 290 DEVICE_DESC_PARAM_PRDCT_REV = 0x2A, 291 DEVICE_DESC_PARAM_HPB_VER = 0x40, 292 DEVICE_DESC_PARAM_HPB_CONTROL = 0x42, 293 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F, 294 DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53, 295 DEVICE_DESC_PARAM_WB_TYPE = 0x54, 296 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55, 297 }; 298 299 /* Interconnect descriptor parameters offsets in bytes*/ 300 enum interconnect_desc_param { 301 INTERCONNECT_DESC_PARAM_LEN = 0x0, 302 INTERCONNECT_DESC_PARAM_TYPE = 0x1, 303 INTERCONNECT_DESC_PARAM_UNIPRO_VER = 0x2, 304 INTERCONNECT_DESC_PARAM_MPHY_VER = 0x4, 305 }; 306 307 /* Geometry descriptor parameters offsets in bytes*/ 308 enum geometry_desc_param { 309 GEOMETRY_DESC_PARAM_LEN = 0x0, 310 GEOMETRY_DESC_PARAM_TYPE = 0x1, 311 GEOMETRY_DESC_PARAM_DEV_CAP = 0x4, 312 GEOMETRY_DESC_PARAM_MAX_NUM_LUN = 0xC, 313 GEOMETRY_DESC_PARAM_SEG_SIZE = 0xD, 314 GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE = 0x11, 315 GEOMETRY_DESC_PARAM_MIN_BLK_SIZE = 0x12, 316 GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE = 0x13, 317 GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE = 0x14, 318 GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE = 0x15, 319 GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE = 0x16, 320 GEOMETRY_DESC_PARAM_RPMB_RW_SIZE = 0x17, 321 GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC = 0x18, 322 GEOMETRY_DESC_PARAM_DATA_ORDER = 0x19, 323 GEOMETRY_DESC_PARAM_MAX_NUM_CTX = 0x1A, 324 GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE = 0x1B, 325 GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE = 0x1C, 326 GEOMETRY_DESC_PARAM_SEC_RM_TYPES = 0x1D, 327 GEOMETRY_DESC_PARAM_MEM_TYPES = 0x1E, 328 GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS = 0x20, 329 GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR = 0x24, 330 GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS = 0x26, 331 GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR = 0x2A, 332 GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS = 0x2C, 333 GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR = 0x30, 334 GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS = 0x32, 335 GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR = 0x36, 336 GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS = 0x38, 337 GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR = 0x3C, 338 GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS = 0x3E, 339 GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR = 0x42, 340 GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE = 0x44, 341 GEOMETRY_DESC_PARAM_HPB_REGION_SIZE = 0x48, 342 GEOMETRY_DESC_PARAM_HPB_NUMBER_LU = 0x49, 343 GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE = 0x4A, 344 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B, 345 GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS = 0x4F, 346 GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS = 0x53, 347 GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ = 0x54, 348 GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE = 0x55, 349 GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE = 0x56, 350 }; 351 352 /* Health descriptor parameters offsets in bytes*/ 353 enum health_desc_param { 354 HEALTH_DESC_PARAM_LEN = 0x0, 355 HEALTH_DESC_PARAM_TYPE = 0x1, 356 HEALTH_DESC_PARAM_EOL_INFO = 0x2, 357 HEALTH_DESC_PARAM_LIFE_TIME_EST_A = 0x3, 358 HEALTH_DESC_PARAM_LIFE_TIME_EST_B = 0x4, 359 }; 360 361 /* WriteBooster buffer mode */ 362 enum { 363 WB_BUF_MODE_LU_DEDICATED = 0x0, 364 WB_BUF_MODE_SHARED = 0x1, 365 }; 366 367 /* 368 * Logical Unit Write Protect 369 * 00h: LU not write protected 370 * 01h: LU write protected when fPowerOnWPEn =1 371 * 02h: LU permanently write protected when fPermanentWPEn =1 372 */ 373 enum ufs_lu_wp_type { 374 UFS_LU_NO_WP = 0x00, 375 UFS_LU_POWER_ON_WP = 0x01, 376 UFS_LU_PERM_WP = 0x02, 377 }; 378 379 /* bActiveICCLevel parameter current units */ 380 enum { 381 UFSHCD_NANO_AMP = 0, 382 UFSHCD_MICRO_AMP = 1, 383 UFSHCD_MILI_AMP = 2, 384 UFSHCD_AMP = 3, 385 }; 386 387 /* Possible values for dExtendedUFSFeaturesSupport */ 388 enum { 389 UFS_DEV_LOW_TEMP_NOTIF = BIT(4), 390 UFS_DEV_HIGH_TEMP_NOTIF = BIT(5), 391 UFS_DEV_EXT_TEMP_NOTIF = BIT(6), 392 UFS_DEV_HPB_SUPPORT = BIT(7), 393 UFS_DEV_WRITE_BOOSTER_SUP = BIT(8), 394 UFS_DEV_EXT_IID_SUP = BIT(16), 395 }; 396 #define UFS_DEV_HPB_SUPPORT_VERSION 0x310 397 398 #define POWER_DESC_MAX_ACTV_ICC_LVLS 16 399 400 /* Attribute bActiveICCLevel parameter bit masks definitions */ 401 #define ATTR_ICC_LVL_UNIT_OFFSET 14 402 #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET) 403 #define ATTR_ICC_LVL_VALUE_MASK 0x3FF 404 405 /* Power descriptor parameters offsets in bytes */ 406 enum power_desc_param_offset { 407 PWR_DESC_LEN = 0x0, 408 PWR_DESC_TYPE = 0x1, 409 PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2, 410 PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22, 411 PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42, 412 }; 413 414 /* Exception event mask values */ 415 enum { 416 MASK_EE_STATUS = 0xFFFF, 417 MASK_EE_DYNCAP_EVENT = BIT(0), 418 MASK_EE_SYSPOOL_EVENT = BIT(1), 419 MASK_EE_URGENT_BKOPS = BIT(2), 420 MASK_EE_TOO_HIGH_TEMP = BIT(3), 421 MASK_EE_TOO_LOW_TEMP = BIT(4), 422 MASK_EE_WRITEBOOSTER_EVENT = BIT(5), 423 MASK_EE_PERFORMANCE_THROTTLING = BIT(6), 424 }; 425 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP) 426 427 /* Background operation status */ 428 enum bkops_status { 429 BKOPS_STATUS_NO_OP = 0x0, 430 BKOPS_STATUS_NON_CRITICAL = 0x1, 431 BKOPS_STATUS_PERF_IMPACT = 0x2, 432 BKOPS_STATUS_CRITICAL = 0x3, 433 BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL, 434 }; 435 436 /* UTP QUERY Transaction Specific Fields OpCode */ 437 enum query_opcode { 438 UPIU_QUERY_OPCODE_NOP = 0x0, 439 UPIU_QUERY_OPCODE_READ_DESC = 0x1, 440 UPIU_QUERY_OPCODE_WRITE_DESC = 0x2, 441 UPIU_QUERY_OPCODE_READ_ATTR = 0x3, 442 UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4, 443 UPIU_QUERY_OPCODE_READ_FLAG = 0x5, 444 UPIU_QUERY_OPCODE_SET_FLAG = 0x6, 445 UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7, 446 UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8, 447 }; 448 449 /* bRefClkFreq attribute values */ 450 enum ufs_ref_clk_freq { 451 REF_CLK_FREQ_19_2_MHZ = 0, 452 REF_CLK_FREQ_26_MHZ = 1, 453 REF_CLK_FREQ_38_4_MHZ = 2, 454 REF_CLK_FREQ_52_MHZ = 3, 455 REF_CLK_FREQ_INVAL = -1, 456 }; 457 458 /* Query response result code */ 459 enum { 460 QUERY_RESULT_SUCCESS = 0x00, 461 QUERY_RESULT_NOT_READABLE = 0xF6, 462 QUERY_RESULT_NOT_WRITEABLE = 0xF7, 463 QUERY_RESULT_ALREADY_WRITTEN = 0xF8, 464 QUERY_RESULT_INVALID_LENGTH = 0xF9, 465 QUERY_RESULT_INVALID_VALUE = 0xFA, 466 QUERY_RESULT_INVALID_SELECTOR = 0xFB, 467 QUERY_RESULT_INVALID_INDEX = 0xFC, 468 QUERY_RESULT_INVALID_IDN = 0xFD, 469 QUERY_RESULT_INVALID_OPCODE = 0xFE, 470 QUERY_RESULT_GENERAL_FAILURE = 0xFF, 471 }; 472 473 /* UTP Transfer Request Command Type (CT) */ 474 enum { 475 UPIU_COMMAND_SET_TYPE_SCSI = 0x0, 476 UPIU_COMMAND_SET_TYPE_UFS = 0x1, 477 UPIU_COMMAND_SET_TYPE_QUERY = 0x2, 478 }; 479 480 /* Offset of the response code in the UPIU header */ 481 #define UPIU_RSP_CODE_OFFSET 8 482 483 enum { 484 MASK_TM_SERVICE_RESP = 0xFF, 485 }; 486 487 /* Task management service response */ 488 enum { 489 UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00, 490 UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04, 491 UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08, 492 UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05, 493 UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09, 494 }; 495 496 /* UFS device power modes */ 497 enum ufs_dev_pwr_mode { 498 UFS_ACTIVE_PWR_MODE = 1, 499 UFS_SLEEP_PWR_MODE = 2, 500 UFS_POWERDOWN_PWR_MODE = 3, 501 UFS_DEEPSLEEP_PWR_MODE = 4, 502 }; 503 504 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10) 505 506 /** 507 * struct utp_cmd_rsp - Response UPIU structure 508 * @residual_transfer_count: Residual transfer count DW-3 509 * @reserved: Reserved double words DW-4 to DW-7 510 * @sense_data_len: Sense data length DW-8 U16 511 * @sense_data: Sense data field DW-8 to DW-12 512 */ 513 struct utp_cmd_rsp { 514 __be32 residual_transfer_count; 515 __be32 reserved[4]; 516 __be16 sense_data_len; 517 u8 sense_data[UFS_SENSE_SIZE]; 518 }; 519 520 /** 521 * struct utp_upiu_rsp - general upiu response structure 522 * @header: UPIU header structure DW-0 to DW-2 523 * @sr: fields structure for scsi command DW-3 to DW-12 524 * @qr: fields structure for query request DW-3 to DW-7 525 */ 526 struct utp_upiu_rsp { 527 struct utp_upiu_header header; 528 union { 529 struct utp_cmd_rsp sr; 530 struct utp_upiu_query qr; 531 }; 532 }; 533 534 /* 535 * VCCQ & VCCQ2 current requirement when UFS device is in sleep state 536 * and link is in Hibern8 state. 537 */ 538 #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */ 539 540 struct ufs_vreg { 541 struct regulator *reg; 542 const char *name; 543 bool always_on; 544 bool enabled; 545 int max_uA; 546 }; 547 548 struct ufs_vreg_info { 549 struct ufs_vreg *vcc; 550 struct ufs_vreg *vccq; 551 struct ufs_vreg *vccq2; 552 struct ufs_vreg *vdd_hba; 553 }; 554 555 /* UFS device descriptor wPeriodicRTCUpdate bit9 defines RTC time baseline */ 556 #define UFS_RTC_TIME_BASELINE BIT(9) 557 558 enum ufs_rtc_time { 559 UFS_RTC_RELATIVE, 560 UFS_RTC_ABSOLUTE 561 }; 562 563 struct ufs_dev_info { 564 bool f_power_on_wp_en; 565 /* Keeps information if any of the LU is power on write protected */ 566 bool is_lu_power_on_wp; 567 /* Maximum number of general LU supported by the UFS device */ 568 u8 max_lu_supported; 569 u16 wmanufacturerid; 570 /*UFS device Product Name */ 571 u8 *model; 572 u16 wspecversion; 573 u32 clk_gating_wait_us; 574 /* Stores the depth of queue in UFS device */ 575 u8 bqueuedepth; 576 577 /* UFS WB related flags */ 578 bool wb_enabled; 579 bool wb_buf_flush_enabled; 580 u8 wb_dedicated_lu; 581 u8 wb_buffer_type; 582 583 bool b_rpm_dev_flush_capable; 584 u8 b_presrv_uspc_en; 585 586 bool b_advanced_rpmb_en; 587 588 /* UFS EXT_IID Enable */ 589 bool b_ext_iid_en; 590 591 /* UFS RTC */ 592 enum ufs_rtc_time rtc_type; 593 time64_t rtc_time_baseline; 594 u32 rtc_update_period; 595 596 u8 rtt_cap; /* bDeviceRTTCap */ 597 }; 598 599 /* 600 * This enum is used in string mapping in ufs_trace.h. 601 */ 602 enum ufs_trace_str_t { 603 UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP, 604 UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR, 605 UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR 606 }; 607 608 /* 609 * Transaction Specific Fields (TSF) type in the UPIU package, this enum is 610 * used in ufs_trace.h for UFS command trace. 611 */ 612 enum ufs_trace_tsf_t { 613 UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT 614 }; 615 616 #endif /* End of Header */ 617