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Searched refs:M4U_LARB5_ID (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/include/dt-bindings/memory/
Dmt8183-larb-port.h16 #define M4U_LARB5_ID 5 macro
67 #define M4U_PORT_CAM_IMGI MTK_M4U_ID(M4U_LARB5_ID, 0)
68 #define M4U_PORT_CAM_IMG2O MTK_M4U_ID(M4U_LARB5_ID, 1)
69 #define M4U_PORT_CAM_IMG3O MTK_M4U_ID(M4U_LARB5_ID, 2)
70 #define M4U_PORT_CAM_VIPI MTK_M4U_ID(M4U_LARB5_ID, 3)
71 #define M4U_PORT_CAM_LCEI MTK_M4U_ID(M4U_LARB5_ID, 4)
72 #define M4U_PORT_CAM_SMXI MTK_M4U_ID(M4U_LARB5_ID, 5)
73 #define M4U_PORT_CAM_SMXO MTK_M4U_ID(M4U_LARB5_ID, 6)
74 #define M4U_PORT_CAM_WPE0_RDMA1 MTK_M4U_ID(M4U_LARB5_ID, 7)
75 #define M4U_PORT_CAM_WPE0_RDMA0 MTK_M4U_ID(M4U_LARB5_ID, 8)
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Dmt6779-larb-port.h17 #define M4U_LARB5_ID 5 macro
90 #define M4U_PORT_IMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 0)
91 #define M4U_PORT_IMGBI_D1 MTK_M4U_ID(M4U_LARB5_ID, 1)
92 #define M4U_PORT_DMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 2)
93 #define M4U_PORT_DEPI_D1 MTK_M4U_ID(M4U_LARB5_ID, 3)
94 #define M4U_PORT_LCEI_D1 MTK_M4U_ID(M4U_LARB5_ID, 4)
95 #define M4U_PORT_SMTI_D1 MTK_M4U_ID(M4U_LARB5_ID, 5)
96 #define M4U_PORT_SMTO_D2 MTK_M4U_ID(M4U_LARB5_ID, 6)
97 #define M4U_PORT_SMTO_D1 MTK_M4U_ID(M4U_LARB5_ID, 7)
98 #define M4U_PORT_CRZO_D1 MTK_M4U_ID(M4U_LARB5_ID, 8)
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Dmt8173-larb-port.h16 #define M4U_LARB5_ID 5 macro
89 #define M4U_PORT_VENC_RCPU_SET2 MTK_M4U_ID(M4U_LARB5_ID, 0)
90 #define M4U_PORT_VENC_REC_FRM_SET2 MTK_M4U_ID(M4U_LARB5_ID, 1)
91 #define M4U_PORT_VENC_REF_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 2)
92 #define M4U_PORT_VENC_REC_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 3)
93 #define M4U_PORT_VENC_BSDMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 4)
94 #define M4U_PORT_VENC_CUR_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 5)
95 #define M4U_PORT_VENC_CUR_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 6)
96 #define M4U_PORT_VENC_RD_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 7)
97 #define M4U_PORT_VENC_SV_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 8)
Dmt2712-larb-port.h16 #define M4U_LARB5_ID 5 macro
71 #define M4U_PORT_DISP_OVL2 MTK_M4U_ID(M4U_LARB5_ID, 0)
72 #define M4U_PORT_DISP_WDMA2 MTK_M4U_ID(M4U_LARB5_ID, 1)
73 #define M4U_PORT_MDP_RDMA2 MTK_M4U_ID(M4U_LARB5_ID, 2)
74 #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB5_ID, 3)