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/linux-6.12.1/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
51 | PCH-LPC | | Devices | | Devices |
64 PCH-LPC/PCH-MSI，然后被EIOINTC统一收集，再直接到达CPUINTC::
82 | PCH-LPC | | Devices | | Devices |
95 送达CPUINTC，而其他所有设备的中断则分别发送到所连接的PCH-PIC/PCH-LPC，然后由EIOINTC
114 | Devices | | PCH-LPC | | Devices |
161 PCH-LPC::
189 - PCH-LPC：即《龙芯7A1000桥片用户手册》第24.3节所描述的“LPC中断”。
/linux-6.12.1/Documentation/translations/zh_TW/arch/loongarch/
Dirq-chip-model.rst16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
51 | PCH-LPC | | Devices | | Devices |
64 PCH-LPC/PCH-MSI，然後被EIOINTC統一收集，再直接到達CPUINTC::
82 | PCH-LPC | | Devices | | Devices |
129 PCH-LPC::
157 - PCH-LPC：即《龍芯7A1000橋片用戶手冊》第24.3節所描述的“LPC中斷”。
/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Drtc-st-lpc.txt1 STMicroelectronics Low Power Controller (LPC) - RTC
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dst,stih407-lpc1 STMicroelectronics Low Power Controller (LPC) - Clocksource
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/linux-6.12.1/Documentation/arch/loongarch/
Dirq-chip-model.rst11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
48 | PCH-LPC | | Devices | | Devices |
61 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by EIOINTC, and then go to
80 | PCH-LPC | | Devices | | Devices |
94 go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and then go to CPUINTC directly::
112 | Devices | | PCH-LPC | | Devices |
159 PCH-LPC::
191 - PCH-LPC is "LPC Interrupts" described in Section 24.3 of
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dst_lpc_wdt.txt1 STMicroelectronics Low Power Controller (LPC) - Watchdog
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/linux-6.12.1/drivers/soc/aspeed/
DKconfig8 tristate "ASPEED LPC firmware cycle control"
13 Control LPC firmware cycle mappings through ioctl()s. The driver
15 host LPC read/write region can be buffered.
18 tristate "ASPEED LPC snoop support"
23 Provides a driver to control the LPC snoop interface which
25 the host to an arbitrary LPC I/O port.
/linux-6.12.1/Documentation/ABI/stable/
Dsysfs-driver-aspeed-vuart5 will appear on the host <-> BMC LPC bus.
13 the UART will appear on the host <-> BMC LPC bus.
21 host via the BMC LPC bus.
/linux-6.12.1/drivers/net/ethernet/nxp/
DKconfig3 tristate "NXP ethernet MAC on LPC devices"
9 some NXP LPC devices. You can safely enable this option for LPC32xx
/linux-6.12.1/drivers/mcb/
DKconfig33 tristate "LPC (non PCI) based MCB carrier"
37 This is a MCB carrier on a LPC or non PCI device.
/linux-6.12.1/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c806 LPC, LPC5, LPC6, LPC7, LPC8, enumerator
871 INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0),
872 INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00),
873 INTC_VECT(LPC, 0xb20),
969 0, DMAC8_11, 0, PECI0, LPC, FRT, 0, TMR45,
1069 { INT2PRI5, 0, 32, 8, { TMR45, 0, FRT, LPC } },
/linux-6.12.1/drivers/mtd/spi-nor/controllers/
DKconfig14 Enable support for the NXP LPC SPI Flash Interface controller.
/linux-6.12.1/Documentation/i2c/busses/
Di2c-sis630.rst52 LPC Controller (rev 36)
/linux-6.12.1/Documentation/core-api/
Ddma-isa-lpc.rst2 DMA with ISA and LPC devices
8 controller. Even though ISA is more or less dead today the LPC bus
/linux-6.12.1/drivers/vfio/pci/
DKconfig46 and LPC bridge config space.
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dlpc1850-ccu.txt36 specific LPC part. Check the user manual for your specific part.
Dlpc1850-cgu.txt42 specific LPC part. Base clocks are numbered from 0 to 27.
/linux-6.12.1/drivers/platform/chrome/
DKconfig133 tristate "ChromeOS Embedded Controller (LPC)"
138 over an LPC bus, including the LPC Microchip EC (MEC) variant.
/linux-6.12.1/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g6.c1121 SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1127 SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1133 SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1139 SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1145 SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1151 SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1165 SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1170 FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1970 ASPEED_PINCTRL_GROUP(LPC),
2212 ASPEED_PINCTRL_FUNC(LPC),
/linux-6.12.1/arch/arm/boot/dts/aspeed/
Daspeed-g6-pinctrl.dtsi346 function = "LPC";
347 groups = "LPC";
/linux-6.12.1/arch/arc/include/asm/
Dentry-arcv2.h56 ; 4a. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI
/linux-6.12.1/drivers/net/wireless/admtek/
Dadm8211.h32 __le32 LPC; /* 0x40 CSR8 */ member
/linux-6.12.1/arch/arm/boot/dts/gemini/
Dgemini-dlink-dns-313.dts212 * Used by fan & G751, conflicts LPC,
/linux-6.12.1/Documentation/accel/
Dintroduction.rst110 * `LPC 2022 Accelerators BOF outcomes summary <https://airlied.blogspot.com/2022/09/accelerators-bo…
/linux-6.12.1/Documentation/hwmon/
Dit87.rst219 All the chips supported by this driver are LPC Super-I/O chips, accessed
220 through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an

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