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Searched refs:L4_0_WB (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_mocs.c101 #define L4_0_WB REG_FIELD_PREP(L4_CACHE_POLICY_MASK, 0) macro
536 MOCS_ENTRY(2, IG_PAT | XE2_L3_3_UC | L4_0_WB, 0),
540 MOCS_ENTRY(4, IG_PAT | XE2_L3_0_WB | L4_0_WB, 0),
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_mocs.c81 #define L4_0_WB _L4_CACHEABILITY(0) macro