Searched refs:KVM_REG_RISCV_TIMER (Results 1 – 5 of 5) sorted by relevance
349 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_TIMER); in timer_id_to_str()351 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_TIMER); in timer_id_to_str()641 case KVM_REG_RISCV_TIMER: in print_reg()726 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(frequency),727 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(time),728 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(compare),729 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),737 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_TIMER | KVM_REG_RISCV_TIMER_REG(state),
167 KVM_REG_RISCV_TIMER); in kvm_riscv_vcpu_get_reg_timer()207 KVM_REG_RISCV_TIMER); in kvm_riscv_vcpu_set_reg_timer()
899 KVM_REG_RISCV_TIMER | i; in copy_timer_reg_indices()1217 case KVM_REG_RISCV_TIMER: in kvm_riscv_vcpu_set_reg()1250 case KVM_REG_RISCV_TIMER: in kvm_riscv_vcpu_get_reg()
39 #define RISCV_TIMER_REG(name) __kvm_reg_id(KVM_REG_RISCV_TIMER, 0, \
242 #define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT) macro