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Searched refs:JH7110_SYSCLK_UART2_CORE (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dstarfive,jh7110-crg.h167 #define JH7110_SYSCLK_UART2_CORE 150 macro
/linux-6.12.1/drivers/clk/starfive/
Dclk-starfive-jh7110-sys.c252 JH71X0_GATE(JH7110_SYSCLK_UART2_CORE, "uart2_core", 0, JH7110_SYSCLK_OSC),
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110.dtsi420 clocks = <&syscrg JH7110_SYSCLK_UART2_CORE>,