Home
last modified time | relevance | path

Searched refs:JH7110_SYSCLK_UART1_CORE (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dstarfive,jh7110-crg.h165 #define JH7110_SYSCLK_UART1_CORE 148 macro
/linux-6.12.1/drivers/clk/starfive/
Dclk-starfive-jh7110-sys.c250 JH71X0_GATE(JH7110_SYSCLK_UART1_CORE, "uart1_core", 0, JH7110_SYSCLK_OSC),
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110.dtsi406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>,