Searched refs:JH7100_CLK_SDIO1_AHB (Results 1 – 3 of 3) sorted by relevance
126 #define JH7100_CLK_SDIO1_AHB 117 macro
194 JH71X0_GATE(JH7100_CLK_SDIO1_AHB, "sdio1_ahb", 0, JH7100_CLK_AHB_BUS),
201 clocks = <&clkgen JH7100_CLK_SDIO1_AHB>,