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Searched refs:JH7100_CLK_JPCGC300_AXIBUS (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/clk/starfive/
Dclk-starfive-jh7100.c115 JH71X0__DIV(JH7100_CLK_JPCGC300_AXIBUS, "jpcgc300_axibus", 8, JH7100_CLK_VCDECBUS_SRC),
116 JH71X0_GATE(JH7100_CLK_GC300_AXI, "gc300_axi", 0, JH7100_CLK_JPCGC300_AXIBUS),
117 JH71X0_GATE(JH7100_CLK_JPCGC300_MAIN, "jpcgc300_mainclk", 0, JH7100_CLK_JPCGC300_AXIBUS),
/linux-6.12.1/include/dt-bindings/clock/
Dstarfive-jh7100.h62 #define JH7100_CLK_JPCGC300_AXIBUS 53 macro