/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | display_mode_vba_util_32.h | 482 bool Interlace, 618 bool Interlace[], 1014 bool Interlace[],
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D | display_mode_vba_32.c | 437 …ermarksAndPerformanceCalculation.SurfaceParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 696 v->MaxVStartupLines[k] = ((mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 774 …hParametersWatermarksAndPerformanceCalculation.myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1439 isInterlaceTiming = (mode_lib->vba.Interlace[k] && in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1533 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1597 mode_lib->vba.Interlace, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2357 == dm_420 && mode_lib->vba.Interlace[k] == 1 && in dml32_ModeSupportAndSystemConfigurationFull() 2730 …deSupportAndSystemConfigurationFull.SurfParameters[k].InterlaceEnable = mode_lib->vba.Interlace[k]; in dml32_ModeSupportAndSystemConfigurationFull() 2962 mode_lib->vba.MaximumVStartup[i][j][k] = ((mode_lib->vba.Interlace[k] && in dml32_ModeSupportAndSystemConfigurationFull() 3083 mode_lib->vba.Interlace, in dml32_ModeSupportAndSystemConfigurationFull() [all …]
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D | display_mode_vba_util_32.c | 2533 bool Interlace, in dml32_CalculatePrefetchSourceLines() argument 2564 *VInitPreFill = dml_floor((VRatio + (double) VTaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in dml32_CalculatePrefetchSourceLines() 2948 bool Interlace[], in dml32_UseMinimumDCFCLK() 3095 Interlace[k], in dml32_UseMinimumDCFCLK() 5607 bool Interlace[], in dml32_CalculateStutterEfficiency() argument 5861 bool isInterlaceTiming = Interlace[k] && !ProgressiveToInterlaceUnitInOPP; in dml32_CalculateStutterEfficiency()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | display_mode_vba_314.c | 201 bool Interlace, 502 bool Interlace[], 673 bool Interlace, 1756 bool Interlace, argument 1769 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); 2376 v->Interlace[k], 2433 v->Interlace[k], 2570 v->Interlace[k], 2629 myPipe.InterlaceEnable = v->Interlace[k]; 3171 isInterlaceTiming = (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP); [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_mode_vba_20v2.c | 85 bool Interlace, 150 bool Interlace, 492 bool Interlace, in CalculateDelayAfterScaler() 529 if (OutputFormat == dm_420 || (Interlace && ProgressiveToInterlaceUnitInOPP)) in CalculateDelayAfterScaler() 876 bool Interlace, in CalculatePrefetchSourceLines() argument 888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines() 1933 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1975 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2132 …lDETC[k], mode_lib->vba.SwathHeightY[k], mode_lib->vba.SwathHeightC[k], mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2177 mode_lib->vba.Interlace[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() [all …]
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D | display_mode_vba_20.c | 126 bool Interlace, 816 bool Interlace, in CalculatePrefetchSourceLines() argument 828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines() 1897 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1939 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2143 mode_lib->vba.Interlace[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 4175 && mode_lib->vba.Interlace[k] == true in dml20_ModeSupportAndSystemConfigurationFull() 4530 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull() 4569 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull() 4760 mode_lib->vba.Interlace[k], in dml20_ModeSupportAndSystemConfigurationFull()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_mode_vba_31.c | 192 bool Interlace, 493 bool Interlace[], 1739 bool Interlace, argument 1752 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); 2357 v->Interlace[k], 2414 v->Interlace[k], 2544 (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP) ? 2610 myPipe.InterlaceEnable = v->Interlace[k]; 3152 isInterlaceTiming = (v->Interlace[k] && !v->ProgressiveToInterlaceUnitInOPP); 3227 v->Interlace, [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
D | dml2_utils.c | 45 dml_timing_array->Interlace[dst_index] = dml_timing_array->Interlace[src_index]; in dml2_util_copy_dml_timing()
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D | display_mode_core_structs.h | 556 dml_bool_t Interlace[__DML_NUM_PLANES__]; member 1243 dml_bool_t *Interlace; member 1486 dml_bool_t *Interlace; member
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D | dml_display_rq_dlg_calc.c | 215 dml_bool_t interlaced = timing->Interlace[plane_idx]; in dml_rq_dlg_get_dlg_reg()
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D | display_mode_core.c | 218 dml_bool_t Interlace, 2376 dml_bool_t Interlace, in CalculatePrefetchSourceLines() argument 2407 …*VInitPreFill = (dml_uint_t)(dml_floor((VRatio + (dml_float_t) VTaps + 1 + Interlace * 0.5 * VRati… in CalculatePrefetchSourceLines() 2698 if (display_cfg->timing.Interlace[k] == 1 && ptoi_supported == true) { in PixelClockAdjustmentForProgressiveToInterlaceUnit() 3922 dml_bool_t isInterlaceTiming = p->Interlace[k] && !p->ProgressiveToInterlaceUnitInOPP; in CalculateStutterEfficiency() 4668 p->Interlace[k], in UseMinimumDCFCLK() 6199 if (timing->Interlace[plane_idx] && !ptoi_supported) in CalculateMaxVStartup() 6373 myPipe->InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_prefetch_check() 7319 …put.OutputFormat[k] == dml_420 && mode_lib->ms.cache_display_cfg.timing.Interlace[k] == 1 && mode_… in dml_core_mode_support() 7657 s->SurfParameters[k].InterlaceEnable = mode_lib->ms.cache_display_cfg.timing.Interlace[k]; in dml_core_mode_support() [all …]
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D | display_mode_util.c | 538 dml_print("DML: timing_cfg: plane=%d, Interlace = %d\n", i, timing->Interlace[i]); in dml_print_dml_display_cfg_timing()
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D | dml2_translation_helper.c | 721 out->Interlace[location] = in->timing.flags.INTERLACE; in populate_dml_timing_cfg_from_stream_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_mode_vba_30.c | 175 bool Interlace, 1614 bool Interlace, in CalculatePrefetchSourceLines() argument 1626 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines() 2235 v->Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2292 v->Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2442 myPipe.InterlaceEnable = v->Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 4186 …|| (v->OutputFormat[k] == dm_420 && v->Interlace[k] == true && v->ProgressiveToInterlaceUnitInOPP … in dml30_ModeSupportAndSystemConfigurationFull() 4413 v->Interlace[k], in dml30_ModeSupportAndSystemConfigurationFull() 4468 v->Interlace[k], in dml30_ModeSupportAndSystemConfigurationFull() 4775 myPipe.InterlaceEnable = v->Interlace[k]; in dml30_ModeSupportAndSystemConfigurationFull() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_mode_vba_21.c | 164 bool Interlace, 1215 bool Interlace, in CalculatePrefetchSourceLines() argument 1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines() 1868 mode_lib->vba.Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1924 mode_lib->vba.Interlace[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2151 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3445 myPipe.InterlaceEnable = mode_lib->vba.Interlace[k]; in CalculatePrefetchSchedulePerPlane() 4390 && mode_lib->vba.Interlace[k] == true in dml21_ModeSupportAndSystemConfigurationFull() 4640 mode_lib->vba.Interlace[k], in dml21_ModeSupportAndSystemConfigurationFull() 4696 mode_lib->vba.Interlace[k], in dml21_ModeSupportAndSystemConfigurationFull()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_mode_vba.c | 594 mode_lib->vba.Interlace[mode_lib->vba.NumberOfActivePlanes] = dst->interlaced; in fetch_pipe_params() 1055 if (mode_lib->vba.Interlace[k] == 1 in PixelClockAdjustmentForProgressiveToInterlaceUnit()
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D | display_mode_vba.h | 498 bool Interlace[DC__NUM_DPP__MAX]; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/bios/ |
D | bios_parser.c | 1293 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_2() 1411 lvds->sLCDTiming.susModeMiscInfo.sbfAccess.Interlace; in get_embedded_panel_info_v1_3()
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/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | atombios.h | 3246 USHORT Interlace:1; member 3262 USHORT Interlace:1;
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/linux-6.12.1/drivers/gpu/drm/amd/include/ |
D | atombios.h | 3723 USHORT Interlace:1; member 3739 USHORT Interlace:1;
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
D | dml2_core_shared.c | 148 bool Interlace, 4536 bool Interlace, in CalculatePrefetchSourceLines() argument 4568 …*VInitPreFill = (unsigned int)(math_floor2((VRatio + (double)VTaps + 1 + (Interlace ? 1 : 0) * 0.5… in CalculatePrefetchSourceLines()
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D | dml2_core_dcn4_calcs.c | 1859 bool Interlace, in CalculatePrefetchSourceLines() argument 1891 …*VInitPreFill = (unsigned int)(math_floor2((VRatio + (double)VTaps + 1 + (Interlace ? 1 : 0) * 0.5… in CalculatePrefetchSourceLines()
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