Searched refs:ISC_HIS_CFG_MODE_R (Results 1 – 4 of 4) sorted by relevance
56 v4l2_ctrl_s_ctrl(isc->r_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()61 v4l2_ctrl_s_ctrl(isc->r_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()74 ((ctrls->offset[ISC_HIS_CFG_MODE_R])) | in isc_update_awb_ctrls()80 ctrls->gain[ISC_HIS_CFG_MODE_R] | in isc_update_awb_ctrls()1535 ctrls->gain[ISC_HIS_CFG_MODE_R] = isc->r_gain_ctrl->val; in isc_s_awb_ctrl()1544 ctrls->offset[ISC_HIS_CFG_MODE_R] = isc->r_off_ctrl->val; in isc_s_awb_ctrl()1605 ctrls->gain[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()1614 ctrls->offset[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()
337 #define ISC_HIS_CFG_MODE_R 0x1 macro
47 v4l2_ctrl_s_ctrl(isc->r_gain_ctrl, ctrls->gain[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()52 v4l2_ctrl_s_ctrl(isc->r_off_ctrl, ctrls->offset[ISC_HIS_CFG_MODE_R]); in isc_update_v4l2_ctrls()65 ((ctrls->offset[ISC_HIS_CFG_MODE_R])) | in isc_update_awb_ctrls()71 ctrls->gain[ISC_HIS_CFG_MODE_R] | in isc_update_awb_ctrls()1483 ctrls->gain[ISC_HIS_CFG_MODE_R] = isc->r_gain_ctrl->val; in isc_s_awb_ctrl()1492 ctrls->offset[ISC_HIS_CFG_MODE_R] = isc->r_off_ctrl->val; in isc_s_awb_ctrl()1552 ctrls->gain[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()1561 ctrls->offset[ISC_HIS_CFG_MODE_R]; in isc_g_volatile_awb_ctrl()