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Searched refs:INTRL2_CPU_CLEAR (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/net/dsa/
Dbcm_sf2.c269 intrl2_0_writel(priv, P_IRQ_MASK(P0_IRQ_OFF), INTRL2_CPU_CLEAR); in bcm_sf2_port_intr_disable()
277 intrl2_1_writel(priv, P_IRQ_MASK(off), INTRL2_CPU_CLEAR); in bcm_sf2_port_intr_disable()
447 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_0_isr()
459 intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_1_isr()
549 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sf2_intr_disable()
551 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sf2_intr_disable()
Dbcm_sf2_regs.h140 #define INTRL2_CPU_CLEAR 0x08 macro
/linux-6.12.1/drivers/net/ethernet/broadcom/
Dbcmsysport.c770 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); in bcm_sysport_desc_rx()
923 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); in __bcm_sysport_tx_reclaim()
926 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); in __bcm_sysport_tx_reclaim()
1147 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); in bcm_sysport_rx_isr()
1198 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sysport_tx_isr()
1941 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sysport_mask_all_intrs()
1944 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sysport_mask_all_intrs()
Dbcmsysport.h113 #define INTRL2_CPU_CLEAR 0x08 macro
/linux-6.12.1/drivers/net/ethernet/broadcom/genet/
Dbcmgenet.c1882 INTRL2_CPU_CLEAR); in __bcmgenet_tx_reclaim()
1885 INTRL2_CPU_CLEAR); in __bcmgenet_tx_reclaim()
2247 INTRL2_CPU_CLEAR); in bcmgenet_desc_rx()
2252 INTRL2_CPU_CLEAR); in bcmgenet_desc_rx()
2507 bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); in bcmgenet_intr_disable()
2509 bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR); in bcmgenet_intr_disable()
3158 bcmgenet_intrl2_1_writel(priv, status, INTRL2_CPU_CLEAR); in bcmgenet_isr1()
3207 bcmgenet_intrl2_0_writel(priv, status, INTRL2_CPU_CLEAR); in bcmgenet_isr0()
4210 bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_WAKE_EVENT, INTRL2_CPU_CLEAR); in bcmgenet_resume_noirq()
Dbcmgenet.h240 #define INTRL2_CPU_CLEAR 0x08 macro